S25FL128SDSMHID03 查看數據表（PDF） - Cypress Semiconductor
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S25FL128SDSMHID03
Cypress Semiconductor
S25FL128SDSMHID03 Datasheet PDF : 144 Pages
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S25FL128S, S25FL256S
Figure 9.23 Read Command Sequence (4-byte Address, 13h or 03h [ExtAdd=1])
CS#
SCK
SI
SO
0 1 2 3 4 5 6 7 8 9 10 36 37 38 39 40 41 42 43 44 45 46 47
Instruction
High Impedance
32-Bit
Address
31 30 29
3210
76
MSB
DATA OUT 1
54321
DATA OUT 2
07
MSB
9.4.2
Fast Read (FAST_READ 0Bh or 4FAST_READ 0Ch)
The instruction
0Bh (ExtAdd=0) is followed by a 3-byte address (A23-A0) or
0Bh (ExtAdd=1) is followed by a 4-byte address (A31-A0) or
0Ch is followed by a 4-byte address (A31-A0)
The address is followed by zero or eight dummy cycles depending on the latency code set in the Configuration Register. The dummy
cycles allow the device internal circuits additional time for accessing the initial address location. During the dummy cycles the data
value on SO is “don’t care” and may be high impedance. Then the memory contents, at the address given, are shifted out on SO.
The maximum operating clock frequency for FAST READ command is 133 MHz.
The address can start at any byte location of the memory array. The address is automatically incremented to the next higher address
in sequential order after each byte of data is shifted out. The entire memory can therefore be read out with one single read
instruction and address 000000h provided. When the highest address is reached, the address counter will wrap around and roll back
to 000000h, allowing the read sequence to be continued indefinitely.
Figure 9.24 Fast Read (FAST_READ) Command Sequence (3-byte Address, 0Bh [ExtAdd=0, LC=10b])
CS#
SCK
SI
SO
CS #
0 1 2 3 4 5 6 7 8 9 10 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
Instruction
High Impedance
24-Bit
Address
Dummy Byte
23 22 21
321076543210
DATA OUT 1
DATA OUT 2
7 654 32 107
MSB
MSB
Figure 9.25 Fast Read Command Sequence (4-byte Address, 0Ch or 0B [ExtAdd=1], LC=10b)
SCK
SI
SO
0 1 2 3 4 5 6 7 8 9 10 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55
Instruction
High Impedance
32-Bit
Address
Dummy Byte
31 30 29
321 0 76543210
DATA OUT 1
DATA OUT 2
7 654 32 107
MSB
MSB
Document Number: 001-98283 Rev. *I
Page 84 of 144
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