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SST39VF1601C-70-4C-MAKE(2010) 查看數據表(PDF) - Silicon Storage Technology

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SST39VF1601C-70-4C-MAKE
(Rev.:2010)
SST
Silicon Storage Technology 
SST39VF1601C-70-4C-MAKE Datasheet PDF : 33 Pages
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16 Mbit Multi-Purpose Flash Plus
SST39VF1601C / SST39VF1602C
Data Sheet
SIX-BYTE CODE FOR BLOCK-ERASE
TBE
ADDRESSES
555
2AA
555
555
2AA
BAX
CE#
OE#
WE#
RY/BY#
TWP
TBY
TBR
DQ15-0
XXAA XX55
XX80 XXAA XX55
XX30
VALID
1380 F32.0
Note: This device also supports CE# controlled Block-Erase operation. The WE# and CE# signals are interchange-
able as long as minimum timings are met. (See Table 16).
BAX = Block Address
WP# must be held in proper logic state (VIL or VIH) 1µs prior to and 1µs after the command sequence.
X can be VIL or VIH, but no other value.
FIGURE 12: WE# Controlled Block-Erase Timing Diagram
©2010 Silicon Storage Technology, Inc.
19
S71380-04-000
05/10

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