PSD833F3A-70UT 查看數據表（PDF） - STMicroelectronics
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PSD833F3A-70UT Datasheet PDF : 128 Pages
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AC/DC parameters
PSD8XXFX
Figure 44. READ timing
tAVLX
tLXAX1
ALE /AS
A/D
MULTIPLEXED
BUS
tLVLX
ADDRESS
VALID
tAVQV
DATA
VALID
ADDRESS
NON-MULTIPLEXED
BUS
ADDRESS
VALID
DATA
NON-MULTIPLEXED
BUS
t(s) CSI
duc RD
(PSEN, DS)
tSLQV
tRLQV
tRLRH
DATA
VALID
tRHQX
tRHQZ
te Pro E
ole R/W
tTHEH
tEHEL
tELTL
- Obs tAVPV
ADDRESS OUT
AI02895
t(s) 1. tAVLX and tLXAX are not required for 80C251 in Page mode or 80C51XA in Burst mode.
uc Table 56. READ timing (5 V devices)
Prod Symbol
Parameter
Conditions
-70
Min Max
-90
Min Max
-15
Turbo
Min Max off
Unit
te tLVLX
le tAVLX
so tLXAX
ObtAVQV
ALE or AS pulse width
Address setup time
Address hold time
Address valid to data valid
15
20
28
ns
(1)
4
6
10
ns
(1)
7
8
11
ns
(1)
70
90
150 + 10 ns
tSLQV
CS valid to data valid
RD to data valid 8-bit bus
75
100
150
ns
(2)
24
32
40
ns
tRLQV
RD or PSEN to data valid
8-bit bus, 8031, 80251
(3)
31
38
45
ns
tRHQX
tRLRH
tRHQZ
RD data hold time
RD pulse width
RD to data high-Z
(4)
0
0
0
ns
(4)
27
32
38
ns
(4)
20
25
30
ns
tEHEL
E pulse width
27
32
38
ns
106/128
Doc ID 7833 Rev 7
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