PSD833F4A-20UIT 查看數據表（PDF） - STMicroelectronics

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PSD833F4A-20UIT

Flash in-system programmable (ISP) ipherals for 8-bit MCUs, 5 V

STMicroelectronics 

Detailed operation

PSD8XXFX

Table 10. Instructions (1)(2)(3)

Instruction

FS0-FS7 or

CSBOOT0-

CSBOOT3

(4)

Cycle 1

Cycle 2

Cycle 3

Cycle 4

Cycle 5 Cycle 6 Cycle 7

READ(5)

1

“READ”

RD @ RA

Read Main

Flash ID(6)

1

AAh@

X555h

55h@ 90h@ Read identifier

XAAAh X555h (A6,A1,A0 = 0,0,1)

Read Sector

Protection(6)(7)

(8)

1

AAh@

X555h

55h@ 90h@ Read identifier

XAAAh X555h (A6,A1,A0 = 0,1,0)

) Program a

t(s Flash Byte(8)

1

AAh@

X555h

55h@ A0h@

XAAAh X555h

PD@ PA

c Flash Sector

u Erase(9)(8)

1

AAh@

X555h

55h@ 80h@

XAAAh X555h

AAh@ X555h

rod Flash Bulk

Erase(8)

1

AAh@

X555h

55h@ 80h@

XAAAh X555h

AAh@ X555h

te P Suspend

Sector

le Erase(10)

1

B0h@

XXXXh

so Resume

b Sector

O Erase(11)

1

30h@

XXXXh

t(s) - Reset(6)

F0h@

1

XXXXh

uc Unlock Bypass

1

AAh@

X555h

55h@ 20h@

XAAAh X555h

rod Unlock Bypass

Program(12)

1

A0h@

XXXXh

PD@ PA

P Unlock Bypass

te Reset(13)

1

90h@ 00h@

XXXXh XXXXh

le 1. All bus cycles are WRITE bus cycles, except the ones with the “READ” label

so 2. All values are in hexadecimal:

bX = Don’t Care. Addresses of the form XXXXh, in this table, must be even addresses

RA = Address of the memory location to be read

O RD = Data read from location RA during the READ cycle

55h@

XAAAh

55h@

XAAAh

30h@

SA

10h@

X555h

30h7@

next SA

PA = Address of the memory location to be programmed. Addresses are latched on the falling edge of Write Strobe (WR,

CNTL0). PA is an even address for PSD in word programming mode.

PD = Data word to be programmed at location PA. Data is latched on the rising edge of Write Strobe (WR, CNTL0)

SA = Address of the sector to be erased or verified. The Sector Select (FS0-FS7 or CSBOOT0-CSBOOT3) of the sector to

be erased, or verified, must be Active (high).

3. Only address bits A11-A0 are used in instruction decoding.

4. Sector Select (FS0 to FS7 or CSBOOT0 to CSBOOT3) signals are active high, and are defined in PSDsoft Express.

5. No Unlock or instruction cycles are required when the device is in the READ mode

6. The Reset instruction is required to return to the READ mode after reading the Flash ID, or after reading the Sector

Protection Status, or if the Error flag bit (DQ5/DQ13) goes high.

7. The data is 00h for an unprotected sector, and 01h for a protected sector. In the fourth cycle, the Sector Select is active,

and (A1,A0)=(1,0)

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Doc ID 7833 Rev 7

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