Electrical characteristics
STM32F302xx/STM32F303xx
6.3.19 DAC electrical specifications
Table 70. DAC characteristics
Symbol
Parameter
Min
VDDA
Analog supply voltage for
DAC ON
2.4
RLOAD(1) Resistive load with buffer ON 5
RO(1)
Impedance output with buffer
OFF
-
CLOAD(1) Capacitive load
-
DAC_OUT Lower DAC_OUT voltage
min(1) with buffer ON
0.2
DAC_OUT Higher DAC_OUT voltage
max(1) with buffer ON
-
DAC_OUT Lower DAC_OUT voltage
min(1) with buffer OFF
-
DAC_OUT Higher DAC_OUT voltage
max(1) with buffer OFF
-
DAC DC current
-
IDDA(3) consumption in quiescent
mode (Standby mode)(2)
-
Typ
Max
Unit
Comments
-
3.6
V
-
-
kΩ
When the buffer is OFF, the Minimum
-
15
kΩ
resistive load between DAC_OUT
and VSS to have a 1% accuracy is
1.5 MΩ
Maximum capacitive load at
-
50
pF DAC_OUT pin (when the buffer is
ON).
It gives the maximum output
-
-
V excursion of the DAC.
It corresponds to 12-bit input code
(0x0E0) to (0xF1C) at VDDA = 3.6 V
-
VDDA – 0.2
V and (0x155) and (0xEAB) at VDDA =
2.4 V
0.5
-
mV
It gives the maximum output
excursion of the DAC.
- VDDA – 1LSB V
-
380
µA
With no load, middle code (0x800) on
the input
-
480
µA
With no load, worst code (0xF1C) on
the input
DNL(3)
Differential non linearity
Difference between two
consecutive code-1LSB)
-
-
-
-
Integral non linearity
-
-
(difference between
INL(3)
measured value at Code i
and the value at Code i on a
-
-
line drawn between Code 0
and last Code 1023)
Offset error
-
-
(difference between
Offset(3) measured value at Code
-
-
(0x800) and the ideal value =
VDDA/2)
-
-
Gain
error(3)
Gain error
-
-
±0.5
LSB Given for a 10-bit input code
±2
LSB Given for a 12-bit input code
±1
LSB Given for a 10-bit input code
±4
LSB Given for a 12-bit input code
±10
±3
±12
±0.5
mV
LSB
Given for a 10-bit input code at VDDA
= 3.6 V
LSB
Given for a 12-bit input code at VDDA
= 3.6 V
% Given for a 12-bit input code
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Doc ID 023353 Rev 5