STM32F302RBT7TR 查看數據表（PDF） - STMicroelectronics
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STM32F302RBT7TR
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STM32F302RBT7TR Datasheet PDF : 133 Pages
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Electrical characteristics
STM32F302xx/STM32F303xx
6.3.17
Communications interfaces
I2C interface characteristics
Unless otherwise specified, the parameters given in Table 59 are derived from tests
performed under ambient temperature, fPCLK1 frequency and VDD supply voltage conditions
summarized in Table 22.
The I2C interface meets the requirements of the standard I2C communication protocol with
the following restrictions: the I/O pins SDA and SCL are mapped to are not “true” open-
drain. When configured as open-drain, the PMOS connected between the I/O pin and VDD is
disabled, but is still present.
The I2C characteristics are described in Table 59. Refer also to Section 6.3.14: I/O port
characteristics for more details on the input/output alternate function characteristics (SDA
and SCL).
Table 59. I2C characteristics(1)
Symbol
Parameter
Standard
mode
Min Max
Fast mode
Min Max
Fast Mode Plus
Unit
Min Max
tw(SCLL)
tw(SCLH)
SCL clock low time
SCL clock high time
4.7
-
4.0
-
1.3
-
0.5
-
µs
0.6
-
0.26
-
tsu(SDA)
th(SDA)
SDA setup time
SDA data hold time
250
-
100
-
50
-
0(3) 3450(2)
0(3)
900(2)
0
450
tr(SDA)
tr(SCL)
SDA and SCL rise time
-
1000
-
300
-
120 ns
tf(SDA)
tf(SCL)
SDA and SCL fall time
-
300
-
300
-
120
th(STA) Start condition hold time
4.0
-
tsu(STA) Repeated Start condition setup time 4.7
-
0.6
-
0.26
-
µs
0.6
-
0.26
-
tsu(STO) Stop condition setup time
4.0
-
0.6
-
0.26
-
μs
tw(STO:STA) Stop to Start condition time (bus free) 4.7
-
1.3
-
0.5
-
μs
Cb
Capacitive load for each bus line
-
400
-
400
-
550 pF
1. The I2C characteristics are the requirements from I2C bus specification rev03. They are guaranteed by design when
I2Cx_TIMING register is correctly programmed (Refer to reference manual). These characteristics are not tested in
production.
2. The maximum Data hold time has only to be met if the interface does not stretch the low period of SCL signal.
3. The device must internally provide a hold time of at least 300ns for the SDA signal in order to bridge the undefined region of
the falling edge of SCL.
Table 60. I2C analog filter characteristics(1)
Symbol
Parameter
Min
Max
Unit
tSP
Pulse width of spikes that are
suppressed by the analog filter
50
260
ns
1. Guaranteed by design, not tested in production.
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Doc ID 023353 Rev 5
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