ST72F324K4TATRE 查看數據表（PDF） - STMicroelectronics

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ST72F324K4TATRE

8-bit MCU for automotive, 3.8 to 5.5V operating range with 8 to 32 Kbyte Flash, 10-bit ADC, 4 timers, SPI, SCI

STMicroelectronics 

ST72324xx-Auto

On-chip peripherals

Table 39. MCCSR register description (continued)

Bit Name

Function

CPU Clock Prescaler

6:5 CP[1:0]

These bits select the CPU clock prescaler which is applied in different slow modes.

Their action is conditioned by the setting of the SMS bit. These two bits are set and

cleared by software:

00: fCPU in Slow mode = fOSC2/2

01: fCPU in Slow mode = fOSC2/4

10: fCPU in Slow mode = fOSC2/8

11: fCPU in Slow mode = fOSC2/16

Slow Mode Select

ct(s) 4 SMS

This bit is set and cleared by software.

0: Normal mode. fCPU = fOSC2.

1: Slow mode. fCPU is given by CP1, CP0.

See Section 8.2: Slow mode and Section 10.2: Main clock controller with real-time

clock and beeper (MCC/RTC) for more details.

du Time Base control

Pro 3:2 TB[1:0]

These bits select the programmable divider time base. They are set and cleared by

software (see Table 40). A modification of the time base is taken into account at the

end of the current period (previously set) to avoid an unwanted time shift. This

te allows to use this time base as a real-time clock.

le Oscillator interrupt Enable

- Obso 1 OIE

This bit set and cleared by software.

0: Oscillator interrupt disabled

1: Oscillator interrupt enabled

This interrupt can be used to exit from Active Halt mode. When this bit is set, calling

the ST7 software HALT instruction enters the Active Halt power saving mode.

t(s) Oscillator interrupt Flag

te Produc 0 OIF

This bit is set by hardware and cleared by software reading the MCCSR register. It

indicates when set that the main oscillator has reached the selected elapsed time

(TB1:0).

0: Timeout not reached

1: Timeout reached

Caution: The BRES and BSET instructions must not be used on the MCCSR

register to avoid unintentionally clearing the OIF bit.

ole.

Obs Table 40. Time base selection

Time base

Counter prescaler

TB1 TB0

fOSC2 = 4 MHz

fOSC2 = 8 MHz

16000

4ms

2ms

0

0

32000

80000

200000

8ms

20ms

50ms

4ms

10ms

25ms

0

1

1

0

1

1

Doc ID 13841 Rev 1

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