UPSD3212AV-24T1F(2009) 查看數據表（PDF） - STMicroelectronics

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UPSD3212AV-24T1F
(Rev.:2009)

Flash programmable system devices with 8032 MCU and USB and programmable logic

STMicroelectronics 

UPSD3212A, UPSD3212C, UPSD3212CV

21 Memory blocks

Memory blocks

The PSD module has the following memory blocks:

● Primary Flash memory

● Secondary Flash memory

● SRAM

The Memory Select signals for these blocks originate from the Decode PLD (DPLD) and are

user-defined in PSDsoft Express.

21.1

Primary Flash memory and secondary Flash memory

description

The primary Flash memory is divided evenly into four equal sectors. The secondary Flash

memory is divided into two equal sectors. Each sector of either memory block can be

separately protected from Program and Erase cycles.

Flash memory may be erased on a sector-by-sector basis. Flash sector erasure may be

suspended while data is read from other sectors of the block and then resumed after

reading.

During a Program or Erase cycle in Flash memory, the status can be output on Ready/Busy

(PC3). This pin is set up using PSDsoft Express Configuration.

21.2

21.2.1

21.2.2

Memory block select signals

The DPLD generates the Select signals for all the internal memory blocks (see Section 22:

PLDs). Each of the four sectors of the primary Flash memory has a Select signal (FS0-FS3)

which can contain up to three product terms. Each of the two sectors of the secondary Flash

memory has a Select signal (CSBOOT0-CSBOOT1) which can contain up to three product

terms. Having three product terms for each Select signal allows a given sector to be

mapped in Program or Data space.

Ready/Busy (PC3)

This signal can be used to output the Ready/Busy status of the Flash memory. The output

on Ready/Busy (PC3) is a '0' (Busy) when Flash memory is being written to, or when Flash

memory is being erased. The output is a '1' (Ready) when no WRITE or Erase cycle is in

progress.

Memory operation

The primary Flash memory and secondary Flash memory are addressed through the MCU

Bus. The MCU can access these memories in one of two ways:

● The MCU can execute a typical bus WRITE or READ operation.

● The MCU can execute a specific Flash memory instruction that consists of several

WRITE and READ operations. This involves writing specific data patterns to special

addresses within the Flash memory to invoke an embedded algorithm. These

instructions are summarized in Table 82.

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