ST6246 查看數據表（PDF） - STMicroelectronics
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ST6246 Datasheet PDF : 72 Pages
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ST62T46B/E46B
LCD CONTROLLER-DRIVER (Continued)
4.5.4 Stand by or STOP operation mode
No clock from the main oscillator is available in
STOP mode for the LCD controller, and the con-
troller is switched off when the STOP instruction is
executed. All segment and common lines are then
switched to ground to avoid any DC biasing of the
LCD elements.
Operation in STOP mode remain possible by
switching to the OSC32KHz, by setting the
HF0..HF2 bit of LCDCR accordingly (Table 18).
Care must be taken for the oscillator switching that
LCD function change is only effective at the end of
a frame. Therefore it must be guaranteed that
enough clock pulses are delivered before entering
into STOP mode. Otherwise the LCD function is
switched off at STOP instruction execution.
Table 18. Oscillator Source Selection
HF2 HF1 HF0
Division Factor
0
0
0 Clock disabled: Display off
0
0
1 Auxiliary 32KHz oscillator
0
1
0 Reserved
1
1
1 Reserved
Others
Division from MCU fINT
4.5.5 LCD Mode Control Register (LCDCR)
Address: DCh - Read/Write
Bits 7-6 = DS0, DS1. Multiplexing ratio select bits.
These bits select the number of common back-
planes used by the LCD control.
7
0
DS1 DS0 HF2 HF1 HF0 LF2 LF1 LF0
Bits 5-3 = HF0, HF1, HF2. Oscillator select bits.
These bits allow the LCD controller to be supplied
with the correct frequency when different high
main oscillator frequencies are selected as system
clock. Table 15 shows the set-up for different clock
crystals.
Bits 2-0 = LF0, LF1, LF2. Base frame frequency
select bits. These bits control the LCD base oper-
ational frequency of the LCD common lines.
LF0, LF1, LF2 define the 32KHz division factor as
shown in Table 19.
Table 19. 32KHz Division Factor for Base
Frequency Selection
LF2 LF1 LF0
32KHz Division Factor
0
0
0 512
0
0
1 386
0
1
0 256
0
1
1 192
1
0
0 128
1
0
1 96
1
1
0 64
1
1
1 Reserved
51/72
387
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