MSP3400CPP 查看數據表（PDF） - Micronas
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MSP3400CPP Datasheet PDF : 72 Pages
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MSP 3400C
PRELIMINARY DATA SHEET
7.3.3. DC Level Register
DC level readout FM1
DC level readout FM2
DC Level
001bhex
H+L
001chex
H+L
[0hex ... 7FFFhex]
values are 16 bit binary
The DC level register measures the DC component of
the incoming FM signals (FM1 and FM2). This can be
used for seek functions in satellite receivers and for IF
FM frequencies fine tuning. For further processing, the
DC content of the demodulated FM signals is sup-
pressed. The time constant τ, defining the transition time
of the DC Level Register, is approximately 28 ms.
7.3.4. MSP Hardware Version Code
Hardware Version
Hardware Version
MSP 3400C – C8
001ehex
H
[00hex ... FFhex]
03hex
A change in the hardware version code defines hard-
ware optimizations that may have influence on the chip’s
behavior. The readout of this register is identical to the
hardware version code in the chip’s imprint.
7.3.5. MSP Major Revision Code
Major Revision
MSP 3400C
001ehex
L
03hex
The MSP 3400C is the third generation of ICs in the MSP
family.
7.3.6. MSP Product Code
Product
MSP 3400C
MSP 3400
MSP 3410
001fhex
0000 0000
0000 1010
0000 1010
H
00hex
0Ahex1)
0Ahex
1) Note: The MSP 3400 hardware is identical to the
MSP 3410. Therefore, the family code readout will show
‘MSP 3410’ instead of its label ‘MSP 3400’.
7.3.7. MSP ROM Version Code
ROM Version
Major software revision
MSP 3400C – B5
MSP 3400C – C6
MSP 3400C – C8
001fhex
L
[00hex ... FFhex]
0000 0101 05hex
0000 0110 06hex
0000 1000 08hex
A change in the ROM version code defines internal soft-
ware optimizations, that may have influence on the
chip’s behavior, e.g. new features may have been in-
cluded. While a software change is intended to create no
compatibility problems, customers that want to use the
new functions can identify new MSP 3400C versions ac-
cording to this number. The readout of this register is
identical to the ROM version code in the chip’s imprint.
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