CY2213(2012) 查看數據表（PDF） - Cypress Semiconductor

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CY2213
(Rev.:2012)

High Frequency Programmable PECL Clock Generator

Cypress Semiconductor 

CLK

CLKB

CLK

CLKB

Figure 13. Cycle-to-cycle Duty Cycle Error

Cycle i

Cycle i+1

tPW+,i+1

tPW+,i

tCYCLE,i+1

tCYCLE, i+1

tDC,ERR = tPW+,i – tPW+,i+1 over many consecutive cycles

Figure 14. Long-term Jitter

tmin

tmax

tJLT = tmax – tmin over many cycles

CY2213

Document Number: 38-07263 Rev. *H

Page 11 of 16

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