GAL16LV8C-10LJ 查看數據表（PDF） - Lattice Semiconductor
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GAL16LV8C-10LJ Datasheet PDF : 22 Pages
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Specifications GAL16LV8D
AC Switching Characteristics
Over Recommended Operating Conditions
TEST
PARAMETER COND1.
DESCRIPTION
tpd2
A
Input or I/O to Combinational Output
tco2
A
Clock to Output Delay
tcf3
— Clock to Feedback Delay
tsu
— Setup Time, Input or Feedback before Clock↑
th
— Hold Time, Input or Feedback after Clock↑
A
Maximum Clock Frequency with
External Feedback, 1/(tsu + tco)
fmax4
A
Maximum Clock Frequency with
Internal Feedback, 1/(tsu + tcf)
A
Maximum Clock Frequency with
No Feedback
twh4
twl4
ten
— Clock Pulse Duration, High
— Clock Pulse Duration, Low
B
Input or I/O to Output Enabled
B
OE to Output Enabled
tdis
C
Input or I/O to Output Disabled
C
OE to Output Disabled
1) Refer to Switching Test Conditions section.
2) Minimum values for tpd and tco are not 100% tested but established by characterization.
3) Calculated from fmax with internal feedback. Refer to fmax Descriptions section.
4) Refer to fmax Descriptions section. Characterized but not 100% tested.
COM
COM
-3
-5
UNITS
MIN. MAX. MIN. MAX.
1 3.5 1 5 ns
1 2.5 1 3 ns
— 2 — 2 ns
3 — 4 — ns
0 — 0 — ns
180 — 142.8 — MHz
200 — 166 — MHz
250 — 166 — MHz
2 — 3 — ns
2 — 3 — ns
— 4.5 — 6 ns
— 3.5 — 5 ns
— 4.5 — 6 ns
— 3.5 — 5 ns
Capacitance (TA = 25°C, f = 1.0 MHz)
SYMBOL
CI
CI/O
PARAMETER
Input Capacitance
I/O Capacitance
TYPICAL
5
5
UNITS
pF
pF
TEST CONDITIONS
VCC = 3.3V, VI = 0V
VCC = 3.3V, VI/O = 0V
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