LTC1289CCS 查看數據表（PDF） - Linear Technology
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LTC1289CCS Datasheet PDF : 28 Pages
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LTC1289
PI FU CTIO S
# PIN
1 – 8 CH0 – CH7
9
COM
FUNCTION
Analog Inputs
Common
10
11
12
13,14
15
16
17
18
19
20
DGND
AGND
V–
REF –, REF+
CS
DOUT
DIN
SCLK
ACLK
VCC
Digital Ground
Analog Ground
Negative Supply
Reference Inputs
Chip Select Input
Digital Data Output
Digital Input
Shift Clock
A/D Conversion Clock
Positive Supply
DESCRIPTION
The analog inputs must be free of noise with respect to AGND.
The common pin defines the zero reference point for all single-ended inputs. It must be free of noise and
is usually tied to the analog ground plane.
This is the ground for the internal logic. Tie to the ground plane.
AGND should be tied directly to the analog ground plane.
Tie V – to the most negative potential in the circuit. (Ground in single supply applications.)
The reference inputs must be kept free of noise with respect to AGND.
A logic low on this input enables data transfer.
The A/D conversion result is shifted out of this output.
The A/D configuration word is shifted into this input.
This clock synchronizes the serial data transfer.
This clock controls the A/D conversion process.
This supply must be kept free of noise and ripple by bypassing directly to the analog ground plane.
BLOCK DIAGRAM
20
VCC
17
DIN
INPUT
SHIFT
REGISTER
CH0 1
CH1 2
3
CH2
CH3 4
CH4 5
6
CH5
CH6 7
CH7 8
COM 9
ANALOG
INPUT MUX
SAMPLE
AND
HOLD
COMP
12-BIT
CAPACITIVE
DAC
10
DGND
11
AGND
12
13
V–
REF–
14
REF+
18
SCLK
OUTPUT
SHIFT
REGISTER
16
DOUT
12-BIT
SAR
CONTROL
AND
TIMING
19
ACLK
15
CS
LTC1289 BD
7
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