STP50NE08 查看數據表（PDF） - STMicroelectronics
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STP50NE08 Datasheet PDF : 8 Pages
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STP50NE08
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
S ymb ol
td(on)
tr
P a ra m et er
Turn-on Time
Rise Time
Qg
Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
Test Conditions
VDD = 40 V
ID = 25 A
RG =4.7 Ω
VGS = 10 V
(see test circuit, figure 3)
VDD = 64 V ID = 50 A VGS = 10 V
Min.
Typ .
37
95
85
19
28
Max.
50
130
110
Unit
ns
ns
nC
nC
nC
SWITCHING OFF
S ymb ol
tr(Vo f f)
tf
tc
P a ra m et er
Off-voltage Rise Time
Fall Time
Cross-over Time
Test Conditions
VDD = 64 V ID = 50 A
RG =4.7 Ω VGS = 10 V
(see test circuit, figure 5)
Min.
Typ .
12
30
50
Max.
17
40
68
Unit
ns
ns
ns
SOURCE DRAIN DIODE
S ymb ol
P a ra m et er
Test Conditions
ISD
ISDM (•)
Source-drain Current
Source-drain Current
(pulsed)
VSD (∗) Forward On Voltage
ISD = 50 A VGS = 0
trr
Reverse Recovery
Time
Qrr
Reverse Recovery
Charge
ISD = 50 A
di/dt = 100 A/µs
VDD = 30 V Tj = 150 oC
(see test circuit, figure 5)
IRRM
Reverse Recovery
Current
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Min.
Typ .
Max.
50
200
Unit
A
A
1.5
V
100
ns
400
nC
8
A
Safe Operating Area
Thermal Impedance
3/8
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