PIC18F010T-I/SN View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC18F010T-I/SN Datasheet PDF : 176 Pages
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PIC18F010/020
DAW
Syntax:
Operands:
Operation:
Decimal Adjust WREG Register
[label] DAW
None
If [WREG<3:0> >9] or [DC = 1]
then
(WREG<3:0>) + 6 → W<3:0>;
else
(WREG<3:0>) → W<3:0>;
If [WREG<7:4> >9] or [C = 1] then
(WREG<7:4>) + 6 → WREG<7:4>;
else
(WREG<7:4>) → WREG<7:4>;
Status Affected: C
Encoding:
0000 0000 0000 0111
Description:
DAW adjusts the eight bit value in
WREG resulting from the earlier
addition of two variables (each in
packed BCD format) and produces
a correct packed BCD result.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Decode
Read
register WREG
Example1:
DAW
Q3
Process
Data
Q4
Write
WREG
Before Instruction
WREG = 0xA5
C
=0
DC
=0
After Instruction
WREG =
C
=
DC
=
Example 2:
0x05
1
0
Before Instruction
WREG = 0xCE
C
=0
DC
=0
After Instruction
WREG =
C
=
DC
=
0x34
1
0
DECF
Decrement f
Syntax:
[ label ] DECF f [ ,d [,a] ]
Operands:
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
Operation:
(f) – 1 → dest
Status Affected: C,DC,N,OV,Z
Encoding:
0000 01da ffff ffff
Description:
Decrement register 'f'. If 'd' is 0, the
result is stored in WREG. If 'd' is 1,
the result is stored back in register
'f' (default). If ’a’ is 0, the Access
Bank will be selected, overriding
the BSR value. If ’a’ is 1, the Bank
will be selected as per the BSR
value.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Decode
Q2
Read
register ’f’
Q3
Process
Data
Q4
Write to
destination
Example:
DECF CNT
Before Instruction
CNT = 0x01
Z
=0
After Instruction
CNT = 0x00
Z
=1
DS41142A-page 114
Preliminary
2001 Microchip Technology Inc.
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