PIC16LC925T-I/CL View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16LC925T-I/CL

64/68-Pin CMOS Microcontrollers with LCD Driver

Microchip Technology 

PIC16C925/926

TABLE 15-8: SPI MODE REQUIREMENTS

Param

No.

Symbol

Characteristic

Min

Typ† Max Units Conditions

70

TssL2scH, SS↓ to SCK↓ or SCK↑ input

TssL2scL

TCY

—

—

ns

71

TscH

71A

SCK input high time (Slave Continuous 1.25TCY + 30 —

—

ns

mode)

Single Byte

40

—

—

ns

72

TscL

72A

SCK input low time (Slave Continuous 1.25TCY + 30 —

—

ns

mode)

Single Byte

40

73

TdiV2scH, Setup time of SDI data input to SCK edge

50

—

—

ns

TdiV2scL

74

TscH2diL,

Hold time of SDI data input to SCK edge

TscL2diL

50

—

—

ns

75

TdoR

SDO data output rise time

—

10

25

ns

76

TdoF

SDO data output fall time

—

10

25

ns

77

TssH2doZ

SS↑ to SDO output hi-impedance

10

—

50

ns

78

TscR

SCK output rise time (Master mode)

—

10

25

ns

79

TscF

SCK output fall time (Master mode)

—

10

25

ns

80

TscH2doV, SDO data output valid after SCK edge

TscL2doV

—

—

50

ns

81

TdoV2scH, SDO data output setup to SCK edge

TdoV2scL

TCY

—

—

ns

82

TssL2doV

SDO data output valid after SS↓ edge

—

—

50

ns

83

TscH2ssH, SS ↑ after SCK edge

TscL2ssH

1.5TCY + 40 —

—

ns

84

Tb2b

Delay between consecutive bytes

1.5TCY + 40 —

—

ns

† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not

tested.

DS39544A-page 154

Preliminary

 2001 Microchip Technology Inc.

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