STPCI2 View Datasheet(PDF) - STMicroelectronics
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STPCI2 Datasheet PDF : 108 Pages
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STPC® ATLAS
4 ELECTRICAL SPECIFICATIONS
4.1. INTRODUCTION
4.2.3. RESERVED DESIGNATED PINS
The electrical specifications in this chapter are
valid for the STPC Atlas.
4.2. ELECTRICAL CONNECTIONS
Pins designated as reserved should be left dis-
connected. Connecting a reserved pin to a pull-up
resistor, pull-down resistor, or an active signal
could cause unexpected results and possible
circuit malfunctions.
4.2.1. POWER/GROUND CONNECTIONS/
DECOUPLING
4.3. ABSOLUTE MAXIMUM RATINGS
Due to the high frequency of operation of the The following table lists the absolute maximum
STPC Atlas, it is necessary to install and test this ratings for the STPC Atlas device. Stresses
device using standard high frequency techniques. beyond those listed under Table 4-1 limits may
The high clock frequencies used in the STPC Atlas cause permanent damage to the device. These
and its output buffer circuits can cause transient are stress ratings only and do not imply that
power surges when several output buffers switch
output levels simultaneously. These effects can be
t(s) minimized by filtering the DC power leads with
low-inductance decoupling capacitors, using low
c impedance wiring, and by utilizing all of the VSS
u and VDD pins.
rod 4.2.2. UNUSED INPUT PINS
P No unused input pin should be left unconnected
te unless they have an integrated pull-up or pull-
down. Connect active-low inputs to VDD through a
le 20 kΩ (±10%) pull-up resistor and active-high
o inputs to VSS. For bi-directionnal active-high
s inputs, connect to VSS through a 20 kΩ (±10%)
b pull-up resistor to prevent spurious operation.
ct(s) - O Table 4-1. Absolute Maximum Ratings
du Symbol
ro VDDx
P VCORE
te VI, VO
le V5T
VESD
soTSTG
ObTOPER
Parameter
DC Supply Voltage
DC Supply Voltage for Core
Digital Input and Output Voltage
5Volt Tolerance
ESD Capacity (Human body mode)
Storage Temperature
Operating Temperature (Note 1)
operation under any conditions other than those
specified in section "Operating Conditions".
Exposure to conditions beyond those outlined in
Table 4-1 may (1) reduce device reliability and (2)
result in premature failure even when there is no
immediately apparent sign of failure. Prolonged
exposure to conditions at or near the absolute
maximum ratings (Table 4-1) may also result in
reduced useful life and reliability.
4.3.1. 5V TOLERANCE
The STPC is capable of running with I/O systems
that operate at 5 V such as PCI and ISA devices.
Certain pins of the STPC tolerate inputs up to
5.5 V. Above this limit the component is likely to
sustain permanent damage.
All 5 volt tolerant pins are outlined in Table 2-3
Buffer Type Descriptions.
Minimum
-0.3
-0.3
-0.3
-0.3
-
-40
0
-40
Maximum
4.0
2.7
VDD + 0.3
5.5
2000
+150
+85
+115
Units
V
V
V
V
V
°C
°C
°C
PTOT Maximum Power Dissipation (package)
-
4.8
W
Note 1: The figures specified apply to the Tcase of a
STPC device that is soldered to a board, as detailed in the
Design Guidelines Section, for Commercial and Industrial
temperature ranges.
44/108
1
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