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STPCI2 View Datasheet(PDF) - STMicroelectronics

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STPCI2 Datasheet PDF : 108 Pages
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4.5.4 PCI INTERFACE
Figure 4-6 and Table 4-12. list the AC characteris-
tics of the PCI interface. PCICLKx stands for any
PCI device clock input.
Figure 4-6. PCI Timing Diagram
STPC® ATLAS
HCLK
PCICLKx
Tclkx
PCICLKI
roduct(s) STPC.output
Thclk
Thigh
Tcycle
Tlow
Toutput (max)
Toutput (min)
bsolete P STPC.input
Thold
Tsetup
t(s) - O Table 4-12. PCI Bus AC Timings
uc Name Parameter
Min
Typ
Max
Unit
d HCLK to PCICLKO delay (MD[30:27] = 1111)
4.4
5.0
5.7
ns
ro Thclk HCLK to PCICLKI delay
6.5
7.5
8.5
ns
P Tclkx PCICLKI to PCICLKx skew
-0.5
0.3
1.0
ns
te Tcycle PCICLKI Cycle Time
30
ns
le Thigh PCICLKI High Time
13
ns
oTlow PCICLKI Low Time
13
ns
Obs Note: These timings are for a load of 50pF.
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