STPCC4 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STPCC4

X86 Core PC Compatible Information Appliance System-on-Chip

STMicroelectronics 

PIN DESCRIPTION

Signal Name

BASIC CLOCKS AND RESETS

SYSRSETI#

SYSRSTO#

XTALI

XTALO

HCLK

DEV_CLK

DCLK

VDD_xxx_PLL1

Table 2-2. Definition of Signal Pins

Dir

Buffer Type2

Description

Qty

I SCHMITT_FT

O BD8STRP_FT

I ANA

I/O OSCI13B

I/O BD4STRP_FT

O BT8TRP_TC

I/O BD4STRP_FT

VDDCO

System Power Good Input

1

System Reset Output

1

14.3 MHz Crystal Input- External

Oscillator Input

1

14.3 MHz Crystal Output

1

Host Clock (Test)

1

24 MHz Peripheral Clock (floppy drive)

1

27-135 MHz Graphics Dot Clock

1

Power Supply for PLL Clocks

SDRAM CONTROLLER

MCLKI

MCLKO

CS#[1:0]

CS2# / MA11

CS3# / MA12 / BA1

BA[0]

MA[10:0]

MD[63:49]

MD[48:1]

MD[0]

RAS#[1:0]

CAS#[1:0]

MWE#

DQM[7:0]

I TLCHT_TC

Memory Clock Input

1

O BT8TRP_TC

Memory Clock Output

1

O BD8STRP_TC

DIMM Chip Select

2

O BD16STARUQP_TC DIMM Chip Select / Memory Address

1

O

BD16STARUQP_TC

DIMM Chip Select / Memory Address /

Bank Address

1

O BD8STRP_TC

Bank Address

1

O BD16STARUQP_TC Memory Row & Column Address

12

I/O BD8STRUP_FT

Memory Data

15

I/O BD8TRP_TC

Memory Data

48

I/O BD8STRUP_FT

Memory Data

1

O BD16STARUQP_TC Row Address Strobe

2

O BD16STARUQP_TC Column Address Strobe

2

O BD16STARUQP_TC Write Enable

1

O BD8STRP_TC

Data Input/Output Mask

8

PCI CONTROLLER

PCI_CLKI

PCI_CLKO

AD[31:0]

CBE[3:0]

FRAME#

IRDY#

TRDY#

LOCK#

DEVSEL#

STOP#

PAR

SERR#

PCIREQ#[2:0]

PCIGNT#[2:0]

PCI_INT#[3:0]

I TLCHT_FT

O BT8TRP_TC

I/O BD8PCIARP_FT

I/O BD8PCIARP_FT

I/O BD8PCIARP_FT

I/O BD8PCIARP_FT

I/O BD8PCIARP_FT

I TLCHT_FT

I/O BD8PCIARP_FT

I/O BD8PCIARP_FT

I/O BD8PCIARP_FT

O BD8PCIARP_FT

I BD8PCIARP_FT

O BD8PCIARP_FT

I BD4STRUP_FT

33 MHz PCI Input Clock

1

33 MHz PCI O/P Clk (from internal PLL) 1

PCI Address / Data

32

Bus Commands / Byte Enables

4

Cycle Frame

1

Initiator Ready

1

Target Ready

1

PCI Lock

1

Device Select

1

Stop Transaction

1

Parity Signal Transactions

1

System Error

1

PCI Request

3

PCI Grant

3

PCI Interrupt Request

4

Note1: These pins are must be connected to the 2.5 V power supply. They must not be connected to the 3.3 V supply.

Note2: See Table 2-3 for buffer type descriptions

12/93

Release 1.5 - January 29, 2002

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