STPCC4 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STPCC4

X86 Core PC Compatible Information Appliance System-on-Chip

STMicroelectronics 

PIN DESCRIPTION

Signal Name

PCS3#,PCS1#,SCS3#,SCS1#

DIORDY

PIRQ, SIRQ

PDRQ, SDRQ

PDACK#, SDACK#

PDIOR#, SDIOR#

PDIOW#, SDIOW#

Table 2-2. Definition of Signal Pins

Dir

Buffer Type2

O BD8STRUP_FT

O BD8STRUP_FT

I BD4STRP_FT

I BD4STRP_FT

O BD8STRP_FT

O BD8STRUP_FT

O BD8STRUP_FT

Description

Qty

Primary & Secondary Chip Selects

4

Data I/O Ready

1

Primary & Secondary Interrupt Request

2

Primary & Secondary DMA Request

2

Primary & Secondary DMA Acknowledge 2

Primary & Secondary I/O Channel Read 2

Primary & Secondary I/O Channel Write 2

VGA CONTROLLER

RED, GREEN, BLUE

O VDDCO

Analog Red, Green, Blue

3

VSYNC

O BD4STRP_FT

Vertical Sync

1

HSYNC

VREF_DAC1

O BD4STRP_FT

Horizontal Sync

1

I ANA

DAC Voltage reference

1

RSET

I ANA

Resistor Set

1

COMP

I ANA

Compensation

1

COL_SEL

O BD4STRP_FT

Colour Select

1

VIDEO INPUT PORT

VCLK

VIN[7:0]

I BD8STRP_FT

I BD4STRP_FT

27-33 MHz Video Input Port Clock

1

CCIR 601 or 656 YUV Video Data Input 8

ANALOG TV OUTPUT PORT

RED_TV, GREEN_TV, BLUE_TV O VDDCO

Analog RGB or S-VHS outputs

3

CVBS

O VDDCO

Analog video composite output

1

IREF1_TV

I ANA

Reference current of CVBS DAC

1

VREF1_TV

I ANA

Reference voltage of CVBS DAC

1

IREF2_TV

I ANA

Reference current of RGB DAC

1

VREF2_TV

I ANA

Reference voltage of RGB DAC

1

VSSA_TV

I

Analog Vss for DAC

1

VDDA_TV

I VDDCO

Analog Vdd for DAC

1

VCS

I/O BD4STRP_FT

Composite Synchro

Horizontal Line Synchro

1

ODD_EVEN

I/O BD4STRP_FT

Frame Synchronisation

1

MISCELLANEOUS

SPKRD

O BD4STRP_FT

Speaker Device Output

1

SCL

I/O BD4STRUP_FT

I²C Interface - Clock

Can be used for VGA DDC[1] signal

1

SDA

I/O BD4STRUP_FT

I²C Interface - Data

Can be used for VGA DDC[0] signal

1

SCAN_ENABLE

I TLCHTD_TC

Reserved (Test pin)

1

TCLK

I TLCHT_FT

Test Clock

1

TDI

I TLCHT_FT

Test Data Input

1

TMS

I TLCHT_FT

Test Mode Set

1

TDO

O BT8TRP_TC

Test Data output

1

Note1: These pins are must be connected to the 2.5 V power supply. They must not be connected to the 3.3 V supply.

Note2: See Table 2-3 for buffer type descriptions

14/93

Release 1.5 - January 29, 2002

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