CL-PS7500FE View Datasheet(PDF) - Cirrus Logic
Part Name
Description
Manufacturer
CL-PS7500FE Datasheet PDF : 251 Pages
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CL-PS7500FE
System-on-a-Chip for Internet Appliance
Table E-1. Synthesized VCO Frequency Settings
r Modulus v Modulus
8
2
16
6
4
2
8
6
2
2
8
9
16
35
4
15
VCO Frequency
(MHz)
8.0
12.0
16.0
24.0
32.0
36.0
70.0
120.0
4. Phase Comparator Reset
The phase comparator and VCO form a closed-loop feedback system that can become unstable. If the
system powers up in the state where the PCOMP output is trying to drive the VCO output higher, it can
quickly reach a frequency where the phase comparator cannot resolve making recovery is impossible. To
avoid this, carefully apply the following reset procedure.
4.1 Reset Procedure
The test bits in the Frequency Synthesizer register can force the phase comparator output either high or
low. Soon after power-up, program this register with:
q bits 15, 14, and 7 high
q bit 6 low
The r and v moduli can have anything programmed into them, but r must be greater than v. This operation
forces the VCO frequency to decrease.
Program the real pixel rate in two steps:
1) Program the values of the r and v moduli, but leave the test bits in the initialization state.
2) Clear all test bits.
The VCO then ramps up to its operating frequency. Subsequently, a change of frequency can be achieved
simply by reprogramming the r and v moduli.
240
June 1997
ADVANCE DATA BOOK v2.0
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