CL-PS7500FE View Datasheet(PDF) - Cirrus Logic

Part Name

Description

Manufacturer

CL-PS7500FE

System-on-a Chip for Internet Appliance

Cirrus Logic 

CL-PS7500FE

System-on-a-Chip for Internet Appliance

2. Configuring DMA within the CL-PS7500FE

The video and sound macrocell must first be programmed to drive dual-panel LCDs as previously

described. When this is done, the macrocell always makes qword DMA requests in pairs. The

CL-PS7500FE is then set into Dual-panel mode by programming the ‘dup’ bit (VIDCR[7], address 0x1E0)

to ‘1’. The eight bits of the VIDCR are now allocated as:

76543210

DXEXXXXX

X = Undefined

E = Enable

D = Duplex LCD

To enable two parallel data streams to be output by the video and sound macrocell to the two panels of

the LCD when Duplex mode is enabled, the CL-PS7500FE DMAs two qwords from memory, offset by half

the size of the video buffer. Since all DMA is qword-only, the auto-increment of the DMA address is now

always 0x10.

The VIDSTART and VIDEND registers are programmed normally (that is, for a single panel) with the

addresses of the first and last qwords in memory. Program the VIDINITA register with the address of the

first qword to display on the upper panel of the LCD; program the VIDINITB register with the address of

the first qword to display on the lower panel of the LCD. The difference between the two addresses is half

the number of bytes in the video buffer.

It is possible for VIDINITA to point to an address in the lower half of the buffer, in which case set VIDINITB

to point to an address in the top half of the buffer, offset again by half the buffer size.

If either of the INIT register values are equal to the end register, bit 30 of the relevant INIT register must

be set high for correct operation (the ‘last’ bit).

NOTE: Never program both of the ‘last’ bits simultaneously high.

3. Cursor

To ensure a smooth transition of the cursor across the dual-panel boundary, four images of the cursor

must be stored in memory. The CL-PS7500FE DMA registers must only be programmed with

qword-aligned addresses. Since the cursor is always 32-pixels wide at 2 bpp, the address of data corre-

sponding to a particular row of the cursor can be aligned with a 2-word boundary. Arrange the four images

as two pairs of contiguous images of the cursor. Only alternate rows of each cursor image start on qword

boundaries.

For reasons previously stated, the two pairs of images are offset so that the first has all the odd rows start-

ing on qword boundaries; the second has all even rows starting on qword boundaries. This means that

CL-PS7500FE can address any row of the cursor using only qword-aligned DMA pointers.

Normally, only the first image is used. However, when the cursor is straddling the split-screen boundary,

VCSR and VCER are programmed as described above and the cursor INIT register must be set to point

to the location corresponding to the position of the row of the cursor that appears at the top of the lower

section of the screen. In conjunction with the different meaning of the vertical cursor position registers in

the video and sound macrocell, this enables a smooth transition across the split-screen boundary.

230

June 1997

ADVANCE DATA BOOK v2.0

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