CL-PS7500FE View Datasheet(PDF) - Cirrus Logic
Part Name
Description
Manufacturer
CL-PS7500FE Datasheet PDF : 251 Pages
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CL-PS7500FE
System-on-a-Chip for Internet Appliance
Table 22-9. Keyboard/Mouse Timing
Symbol Parameter
tkclk
Keyboard clock period
tkckl
Keyboard clock low time
tkckh
Keyboard clock high time
tdhi
Hold on DATA from CLK rising for receive
tdsi
Setup on DATA to CLK falling for receive
tdso
Setup on DATA to CLK rising for transmit
tdho
Hold on DATA from CLK falling for transmit
tki
Time for which CLK is held low to request a send
tkrg
Clock low from CL-PS7500FE to clock low from the
keyboard for a request to send
tksb
Clock low to DATA low hold time for a request to send
40 MHz
MIN MAX
56 MHz
MIN MAX
Units
1
100
1
100
µs
0.5
50
0.5
50
µs
0.5
50
0.5
50
µs
1
tkclk − 1
1
tkclk − 1
µs
tkclk − 1
tkclk − 1
µs
tkclk − 1
tkclk
tkclk − 1
tkclk
µs
0
1
0
1
µs
63.5
64.5
63.5
64.5
µs
1
1
µs
1
1
µs
KCLK
RA[11:0]
1
2
3
4
5
6
7
8
9
10
Data 0 Data 1 Data 2 Data 3 Data 4 Data 5 Data 6 Data 7 Parity Stop
Keyboard/Mouse Controller Receive Protocol
KCLK
KDATA RECEIVE
KDATA TRANSMIT
KCLK REQUEST
TO SEND
KDATA REQUEST
TO SEND
tk c k l
tk c k h
td h i
td s i
td s o
td h o
tk i
tk r g
tk s b
Figure 22-24. Keyboard/Mouse Timing
220
ELECTRICAL SPECIFICATIONS
ADVANCE DATA BOOK v2.0
June 1997
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