MC80F0704/0708/0804/0808
22. Device Configuration Area
The Device Configuration Area can be programmed or left un-
programmed to select device configuration such as POR, ONP,
CLK option and security bit. This area is not accessible during
normal execution but is readable and writable during FLASH
program / verify mode.
Note: The Configuration Option may not be read exactly
when VDD rising time is very slow. It is recommended to
adjust the VDD rising time faster than 40ms/V (200ms from
0V to 5V).
7
6
5
4
3
2
1
0
Configuration Option Bits ONP OFP LOCK POR R35EN CLK2 CLK1 CLK0
ADDRESS: 20FFH
INITIAL VALUE: 00H
Oscillation configuration
000 : IN4MCLK (Internal 4MHz Oscillation & R33/R34 Enable)
001 : IN2MCLK (Internal 2MHz Oscillation & R33/R34 Enable)
010 : EXRC (External R/RC Oscillation & R34 Enable)
011 : X-tal (Crystal or Resonator Oscillation)
100 : IN4MCLKXO (internal 4MHz Oscillation & R33 Enable
& XOUT = fSYS ÷ 4)
101 : IN2MCLKXO (internal 2MHz Oscillation & R33 Enable
& XOUT = fSYS ÷ 4)
110 : EXRCXO (External R/RC Oscillation & XOUT = fSYS ÷ 4)
111 : Prohibited
RESET/R35 Port configuration
0 : R35 Port Disable (Use RESET)
1 : R35 Port Enable (Disable RESET)
POR Use
0 : Disable POR Reset
1 : Enable POR Reset
Security Bit
0 : Enable reading User Code
1 : Disable reading User Code
OFP use
0 : Disable OFP (Clock Changer)
1 : Enable OFP (Clock Changer)
ONP disable
0 : Enable ONP (Enable OFP, Internal 4MHz/2MHz oscillation)
1 : Disable ONP (Disable OFP, Internal 4MHz/2MHz oscillation)
Figure 22-1 Device Configuration Area
October 31, 2011 Ver 1.03
101