PIC18LF4523T-I/SO View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC18LF4523T-I/SO
Microchip Technology
PIC18LF4523T-I/SO Datasheet PDF : 54 Pages
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PIC18F2423/2523/4423/4523
TABLE 1-3: PIC18F4423/4523 PINOUT I/O DESCRIPTIONS
Pin Name
Pin Number
Pin Buffer
PDIP QFN TQFP Type Type
Description
MCLR/VPP/RE3
MCLR
VPP
RE3
OSC1/CLKI/RA7
OSC1
CLKI
RA7
1 18 18
Master Clear (input) or programming voltage (input).
I
ST
Master Clear (Reset) input. This pin is an active-low
Reset to the device.
P
Programming voltage input.
I
ST
Digital input.
13 32 30
Oscillator crystal or external clock input.
I
ST
Oscillator crystal input or external clock source input.
ST buffer when configured in RC mode;
analog otherwise.
I CMOS External clock source input. Always associated with
pin function, OSC1. (See related OSC1/CLKI,
OSC2/CLKO pins.)
I/O TTL General purpose I/O pin.
OSC2/CLKO/RA6
OSC2
CLKO
RA6
14 33 31
Oscillator crystal or clock output.
O
—
Oscillator crystal output. Connects to crystal
or resonator in Crystal Oscillator mode.
O
—
In RC mode, OSC2 pin outputs CLKO, which
has 1/4 the frequency of OSC1 and denotes
the instruction cycle rate.
I/O TTL General purpose I/O pin.
Legend:
TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
O = Output
I2C = I2C™/SMBus
CMOS = CMOS compatible input or output
I
= Input
P
= Power
Note 1: Default assignment for CCP2 when Configuration bit, CCP2MX, is set.
2: Alternate assignment for CCP2 when Configuration bit, CCP2MX, is cleared.
DS39755C-page 18
© 2009 Microchip Technology Inc.
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