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FDC37B78X View Datasheet(PDF) - SMSC -> Microchip

Part Name
Description
Manufacturer
FDC37B78X Datasheet PDF : 258 Pages
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Chip Level (Global) Control/Configuration Registers [0x00-0x2F]
The chip-level (global) registers lie in the address range [0x00-0x2F]. The design MUST use all 8 bits
of the ADDRESS Port for register selection. All unimplemented registers and bits ignore writes and
return zero when read. The INDEX PORT is used to select a configuration register in the chip. The
DATA PORT is then used to access the selected register. These registers are accessable only in the
Configuration Mode.
REGISTER
Config Control
Default = 0x00
on Vcc POR or
Reset_Drv
Index Address
Default = 0x03
on Vcc POR or
Reset_Drv
TABLE 71 - CHIP LEVEL REGISTERS
ADDRESS
DESCRIPTION
Chip (Global) Control Registers
0x00 -
0x01
Reserved - Writes are ignored, reads return 0.
0x02 W
The hardware automatically clears this bit after the
write, there is no need for software to clear the bits.
Bit 0 = 1: Soft Reset. Refer to the "Configuration
Registers" table for the soft reset value for each
register.
0x03 R/W
Bit[7]
= 1 Enable GP1, WDT_CTRL, GP5, GP6, Soft
Power Enable and Status Register access when not
in configuration mode
= 0 Disable GP1, WDT_CTRL, GP5, GP6, Soft
Power Enable and Status Register access when not
in configuration mode (Default)
Bits [6:2]
Reserved - Writes are ignored, reads return 0.
STATE
C
0x04 - 0x06
Bits[1:0]
Sets GP1 etc. selection register used when in Run
mode (not in Configuration Mode).
= 11 0xEA (Default)
= 10 0xE4
= 01 0xE2
= 00 0xE0
Reserved - Writes are ignored, reads return 0.
Logical Device 0x07 R/W A write to this register selects the current logical
C
#
device. This allows access to the control and
Default = 0x00
configuration registers for each logical device. Note:
on Vcc POR or
the Activate command operates only on the selected
Reset_Drv
logical device.
176

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