LH28F160S5-L/S5H-L
FULL STATUS CHECK PROCEDURE FOR
MULTI WORD/BYTE WRITE OPERATION
Read Status Register
1
SR.3 =
0
VPP Range Error
SR.1 = 1
0
Device Protect Error
SR.4, 5 = 1
0
Command Sequence
Error
SR.4 = 1 Multi Word/Byte Write
Error
0
Multi Word/Byte Write
Successful
BUS
OPERATION COMMAND
COMMENTS
Standby
Check SR.3
1 = VPP Error Detect
Standby
Check SR.1
1 = Device Protect Detect
WP# = VIL, Block Lock-Bit is Set
Only required for systems implement-
ing block lock-bit configuration
Standby
Check SR.4, 5
Both 1 = Command Sequence Error
Standby
Check SR.4
1 = Data Write Error
SR.5, SR.4, SR.3 and SR.1 are only cleared by the Clear
Status Register command in cases where multiple locations
are written before full status is checked.
If error is detected, clear the status register before attempting
retry or other error recovery.
Fig. 7 Full Status Check Procedure for Automated Multi Word/Byte Write
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