ST10F269Z2QX View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST10F269Z2QX

16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM

STMicroelectronics 

ST10F269Z2Qx

Table 35 : Multiplexed Bus Characteristics

Symbol

Parameter

Max. CPU Clock

= 40MHz

min.

max.

t42 CC ALE fall. edge to RdCS, WrCS 7 + tA

–

(with RW delay)

t43 CC ALE fall. edge to RdCS, WrCS -5.5 + tA

–

(no RW delay)

t44 CC Address float after RdCS,

–

0

WrCS (with RW delay)

1

t45 CC Address float after RdCS,

–

WrCS (no RW delay)

1

12.5

t46 SR RdCS to Valid Data In

(with RW delay)

–

4 + tC

t47 SR RdCS to Valid Data In

(no RW delay)

–

16.5 + tC

t48 CC RdCS, WrCS Low Time

(with RW delay)

15.5 + tC

–

t49 CC RdCS, WrCS Low Time

(no RW delay)

28 + tC

–

t50 CC Data valid to WrCS

10 + tC

–

t51 SR Data hold after RdCS

0

–

t52 SR Data float after RdCS

1

–

16.5 + tF

t54 CC Address hold after

RdCS, WrCS

6 + tF

–

t56 CC Data hold after WrCS

6 + tF

–

Note: 1. Partially tested, guaranteed by design characterization.

Variable CPU Clock

1/2 TCL = 1 to 40MHz

min.

TCL - 5.5+ tA

max.

–

ns

-5.5 + tA

–

ns

–

0

ns

–

TCL

ns

–

2 TCL - 21 + tC ns

–

3 TCL - 21 + tC ns

2 TCL - 9.5 + tC

–

ns

3 TCL - 9.5 + tC

–

ns

2 TCL - 15+ tC

–

ns

0

–

ns

–

2 TCL - 8.5+tF ns

2 TCL - 19 + tF

–

ns

2 TCL - 19 + tF

–

ns

142/161

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