VNH3ASP30-E
Figure 5. Typical Application Circuit For Dc To 20KHz PWM Operation
VCC
Reg 5V
µC
+ 5V
3.3K
1K
DIAGA/ENA
1K
PWM
1K INA
10K CS
33nF
1.5K
HSA
OUTA
LSA
VCC
HSB
OUTB
LSB
M
100K
S
G
b) N MOSFET
D
In case of a fault condition the DIAGX/ENX pin is consid-
ered as an output pin by the device.
The fault conditions are:
- overtemperature on one or both high sides (for example
if a short to ground occurs as it could be the case
described in line 1 and 2 in the table below);
- short to battery condition on the output (saturation
detection on the Low-Side Power MOSFET).
Possible origins of fault conditions may be:
OUTA is shorted to ground ---> overtemperature
detection on high side A.
OUTA is shorted to VCC ---> Low-Side Power MOSFET
saturation detection.
When a fault condition is detected, the user can know
which power element is in fault by monitoring the INA,
INB, DIAGA/ENA and DIAGB/ENB pins. In any case,
when a fault is detected, the faulty leg of the bridge is
latched off. To turn-on the respective output (OUTX)
again, the input signal must rise from low to high level.
Table 15. Truth Table In Fault Conditions (detected on OUTA)
INA
INB
1
1
1
0
0
1
0
0
X
X
X
1
X
0
DIAGA/ENA
0
0
0
0
0
0
0
DIAGB/ENB
1
1
1
1
0
1
1
OUTA
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OUTB
H
L
H
L
OPEN
H
L
CS
High Imp.
High Imp.
IOUTB/K
High Imp.
High Imp.
IOUTB/K
High Imp.
Fault Information
Protection Action
8/18