0.30
TA = 25°C
0.25
VDD = VREFIN = 5V
0.20
0.15
VDD = VREFIN = 3V
0.10
0.05
0
–40 –20
0
20
40
60
TEMPERATURE (°C)
80
100
Figure 34. Supply Current vs. Temperature
VDD = VREF = 5V
TA = 25°C
FULL-SCALE CODE CHANGE
0x0000 TO 0xFFFF
OUTPUT LOADED WITH 2kΩ
AND 200pF TO GND
VOUT = 909mV/DIV
1
TIME BASE = 4µs/DIV
Figure 35. Full-Scale Settling Time, 5 V
VDD = VREF = 5V
TA = 25°C
VDD
1
2
VOUT
MAX(C2)*
420.0mV
CH1 2.0V
CH2 500mV
M100µs 125MS/s
A CH1 1.28V
Figure 36. Power-On Reset to 0 V
8.0ns/pt
AD5623R/AD5643R/AD5663R
SYNC
1
SLCK
3
VOUT
VDD = 5V
2
CH1 5.0V CH2 500mV M400ns
CH3 5.0V
A CH1 1.4V
Figure 37. Exiting Power-Down to Midscale
2.538
2.537
2.536
2.535
2.534
2.533
2.532
2.531
2.530
2.529
2.528
2.527
2.526
2.525
2.524
2.523
2.522
2.521
0
VDD = VREF = 5V
TA = 25°C
5ns/SAMPLE NUMBER
GLITCH IMPULSE = 9.494nV
1LSB CHANGE AROUND
MIDSCALE (0x8000 TO 0x7FFF)
50 100 150 200 250 300 350 400 450 512
SAMPLE NUMBER
Figure 38. Digital-to-Analog Glitch Impulse (Negative)
2.498
2.497
2.496
VDD = VREF = 5V
TA = 25°C
5ns/SAMPLE NUMBER
ANALOG CROSSTALK = 0.424nV
2.495
2.494
2.493
2.492
2.491
0 50 100 150 200 250 300 350 400 450 512
SAMPLE NUMBER
Figure 39. Analog Crosstalk, External Reference
Rev. A | Page 15 of 28