AD5749ACPZ-RL7(Rev0) View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

AD5749ACPZ-RL7
(Rev.:Rev0)

Industrial Current Out Driver, Single-Supply, 55 V Maximum Supply, Programmable Ranges

Analog Devices 

PACKET ERROR CHECKING

To verify that data has been received correctly in noisy

environments, the AD5749 offers the option of error checking

based on an 8-bit (CRC-8) cyclic redundancy check. The device

controlling the AD5749 should generate an 8-bit frame check

sequence using the following polynomial:

C(x) = x8 + x2 + x1 + 1

This is added to the end of the data-word, and 24 data bits are

sent to the AD5749 before taking SYNC high. If the AD5749

receives a 24-bit data frame, it performs the error check when

SYNC goes high. If the check is valid, then the data is written to

the selected register. If the error check fails, the FAULT pin goes

low and Bit D3 of the status register is set. After reading this

register, this error flag is cleared automatically and the FAULT

pin goes high again.

AD5749

SYNC

UPDATE ON SYNC HIGH

SCLK

SDIN

D15

(MSB)

16-BIT DATA

D0

(LSB)

16-BIT DATA TRANSER—NO ERROR CHECKING

SYNC

UPDATE AFTER SYNC HIGH

ONLY IF ERROR CHECK PASSED

SCLK

SDIN

D23

(MSB)

16-BIT DATA

D8

(LSB)

D7

D0

8-BIT FCS

FAULT

FAULT GOES LOW IF

ERROR CHECK FAILS

16-BIT DATA TRANSER WITH ERROR CHECKING

Figure 34. PEC Error Checking Timing

Rev. 0 | Page 23 of 28

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