AD5749ACPZ-RL7(Rev0) View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
AD5749ACPZ-RL7
(Rev.:Rev0)
(Rev.:Rev0)
Analog Devices
AD5749ACPZ-RL7 Datasheet PDF : 28 Pages
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AD5749
Parameter1
OUTPUT CHARACTERISTICS2
Current Loop Compliance
Voltage
Resistive Load
Inductive Load
Settling Time
4 mA to 20 mA, Full-Scale
Step
120 μA Step, 4 mA to
20 mA Range
DC PSRR
Output Impedance
DIGITAL INPUTS2
Input High Voltage, VIH
Input Low Voltage, VIL
Input Current
Pin Capacitance
DIGITAL OUTPUTS2
FAULT, IFAULT, TEMP, VFAULT
VOL, Output Low Voltage
VOH, Output High Voltage
SDO
VOL, Output Low Voltage
VOH, Output High Voltage
High Impedance Output
Capacitance
High Impedance Leakage
Current
POWER REQUIREMENTS
AVDD
DVCC
Input Voltage
AIDD
Min
Typ
Max
0
AVDD − 2.75
See the Test Conditions/
Comments column
8.5
1.2
1
130
2
0.8
−1
+1
5
0.4
0.6
3.6
0.5
DVCC − 0.5
0.5
DVCC − 0.5
3
−1
+1
10.8
55
2.7
5.5
4.4
5.6
Unit
V
H
μs
μs
μA/V
MΩ
V
V
μA
pF
V
V
V
V
V
pF
μA
V
V
mA
DICC
Power Dissipation
5.2
6.2
mA
0.3
1
mA
108
mW
1 Temperature range: −40°C to +105°C; typical at +25°C.
2 Guaranteed by design and characterization, not production tested.
Test Conditions/Comments
Chosen such that compliance is not exceeded
Needs appropriate capacitor at higher inductance
values; see the Driving Inductive Loads section
250 Ω load
250 Ω load
JEDEC compliant
Per pin
Per pin
10 kΩ pull-up resistor to DVCC
At 2.5 mA
10 kΩ pull-up resistor to DVCC
Sinking 200 μA
Sourcing 200 μA
Output unloaded, output disabled;
R3, R2, R1, R0 = 0000, RSET = 0
Output enabled
VIH = DVCC, VIL = GND
AVDD = 24 V, output unloaded
Rev. 0 | Page 4 of 28
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