AD8364ACPZ-WP(RevB) View Datasheet(PDF) - Analog Devices
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AD8364ACPZ-WP Datasheet PDF : 44 Pages
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Data Sheet
PRINTED CIRCUIT BOARD CONSIDERATIONS
Each RF input pin of the AD8364 presents 100 Ω impedance
relative to their respective ac grounds. To ensure that signal
integrity is not seriously impaired by the printed circuit board
(PCB), the relevant connection traces should provide appropriate
characteristic impedance to the ground plane. This can be
achieved through proper layout. When laying out an RF trace
with controlled impedance, consider the following:
• When calculating the RF line impedance, take into account
the spacing between the RF trace and the ground on the
same layer.
• Ensure that the width of the microstrip line is constant and
that there are as few discontinuities, such as component
pads, as possible along the length of the line. Width variations
cause impedance discontinuities in the line and may result
in unwanted reflections.
• Do not use silkscreen over the signal line because it can
alter the line impedance.
• Keep the length of the RF input traces as short as possible.
Figure 80 shows the cross section of a PC board, and Table 6
shows two possible sets of dimensions that provide a 100 Ω line
impedance for FR-4 board material with εr = 4.6 and Rodgers 4003
board material with εr = 3.38.
Table 6. Possible Trace Dimensions for ZO = 100 Ω
Dimension
FR-4 (mil)
Rodgers 4003 (mil)
W
22
6
H
53
11
T
2
0.7
3W
W
3W
T
H
ER
Figure 80. Cross-Section View of a PC Board
It is possible to approximate a 100 Ω trace on a board designed
with the 50 Ω dimensions above by removing the ground plane
within three line widths of the area directly below the trace.
However, more predictable performance may be obtained with
precise ground plane spacing. It is possible to design a circuit
board with two ground planes, one plane for areas with 50 Ω
characteristic impedance and another for areas with 100 Ω
characteristic impedance. If the 100 Ω plane is placed below the
50 Ω plane, then an opening can be made in the 50 Ω plane to
allow the 100 Ω traces to work against the 100 Ω ground plane.
The two ground planes should be connected together with as
many vias as possible.
AD8364
The accurate measurement range (that is, the dynamic range) of
AD8364’s detectors is sensitive to amplitude and phase matching
of the signals presented at the differential inputs. Care should be
taken to ensure matching of these parameters and to minimize
parasitic capacitance on the RF inputs when laying out the PC
board. It is also suggested that the two traces associated with
each differential input be mirror images, or duplicates, of one
another where possible. A high quality balun with known
output magnitude and phase characteristics is recommended to
perform single-ended to balanced conversions. It is possible to
improve the dynamic range by skewing the amplitude and
phase matching at the input. See the Typical Performance
Characteristics section for more details.
Stable, low ESR capacitors are mandatory in the RF circuitry of
the AD8364. This corresponds to capacitors connected to
Pins INH[A, B], INL[A, B], DEC[A, B], and CHP[A, B]. High
ESR capacitors may result in amplitude and phase mismatch at
the differential inputs, which in turn results in low dynamic range.
Capacitors with poor aging characteristics under temperature
cycling have been shown to accentuate the temperature drift
during operation of the AD8364. Use of Samsung CL10 series
multilayer ceramic capacitors (or similar) in the RF area are
recommended.
High transient and noise levels on the power supply, ground,
and inputs should be avoided. This reinforces the need for
proper supply bypassing and decoupling. See the Evaluation
Board section for suggestions.
A solder appropriate for either the lead-free or leaded version of
the AD8364 should be chosen. After the circuit board has been
soldered, it is important to thoroughly clean all excess solder
flux and residues from the board. Any residual material may act
as stray parasitic capacitance, which could result in degraded
performance.
PACKAGE CONSIDERATIONS
The AD8364 uses a compact 32-lead LFCSP. A large exposed
paddle on the bottom of the device provides both a thermal
benefit and a low inductance path to ground for the circuit. To
make proper use of this packaging feature, the PCB RF/dc
common ground reference needs to make contact directly
under the device with as many vias as possible to lower the
inductance and thermal impedance.
Rev. B | Page 37 of 44
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