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AD9572ACPZPEC-RL(Rev0) View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
AD9572ACPZPEC-RL Datasheet PDF : 20 Pages
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AD9572
CLOCK OUTPUTS
Typical (typ) is given for VS = 3.3 V ± 10%, TA = 25°C, unless otherwise noted. Minimum (min) and maximum (max) values are given
over full VS and TA (−40°C to +85°C) variation.
Table 6.
Parameter
Min
Typ
Max
Unit
LVPECL CLOCK OUTPUTS
Output Frequency
156.25
MHz
Output High Voltage (VOH)
VS − 1.24
VS − 1.05
VS − 0.83
V
Output Low Voltage (VOL)
VS − 2.07
VS − 1.87
VS − 1.62
V
Output Differential Voltage (VOD)
700
825
950
mV
Duty Cycle
45
55
%
LVDS CLOCK OUTPUTS
Output Frequency
156.25
MHz
Differential Output Voltage (VOD)
250
350
475
mV
Delta VOD
25
mV
Output Offset Voltage (VOS)
1.125
1.25
1.375
V
Delta VOS
25
mV
Short-Circuit Current (ISA, ISB)
14
24
mA
Duty Cycle
45
55
%
CMOS CLOCK OUTPUTS
Output Frequency
33.33
MHz
Output High Voltage (VOH)
VS − 0.1
V
Output Low Voltage (VOL)
0.1
V
Duty Cycle
42
58
%
Test Conditions/Comments
Output shorted to GND
Sourcing 1.0 mA current
Sinking 1.0 mA current
TIMING CHARACTERISTICS
Typical (typ) is given for VS = 3.3 V ± 10%, TA = 25°C, unless otherwise noted. Minimum (min) and maximum (max) values are given
over full VS and TA (−40°C to +85°C) variation.
Table 7.
Parameter
LVPECL
Output Rise Time, tRP
Output Fall Time, tFP
LVDS
Output Rise Time, tRL
Output Fall Time, tFL
CMOS
Output Rise Time, tRC
Output Fall Time, tFC
Min
Typ
Max
Unit
Test Conditions/Comments
Termination = 200 Ω to 0 V; CLOAD = 0 pF
480
625
810
ps
20% to 80%, measured differentially
480
625
810
ps
80% to 20%, measured differentially
Termination = 100 Ω differential; CLOAD = 0 pF
160
350
540
ps
20% to 80%, measured differentially
160
350
540
ps
80% to 20%, measured differentially
Termination = 50 Ω to 0 V; CLOAD = 5 pF
0.25
0.50
2.5
ns
20% to 80%
0.25
0.70
2.5
ns
80% to 20%
Rev. 0 | Page 6 of 20

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