AD9572ACPZPEC-RL(Rev0) View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

AD9572ACPZPEC-RL
(Rev.:Rev0)

Fiber Channel/Ethernet Clock Generator IC, PLL Core, Dividers, 7 Clock Outputs

Analog Devices 

AD9572

CONTROL PINS

Typical (typ) is given for VS = 3.3 V ± 10%, TA = 25°C, unless otherwise noted. Minimum (min) and maximum (max) values are given

over full VS and TA (−40°C to +85°C) variation.

Table 8.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

INPUT CHARACTERISTICS

REFSEL Pin

Logic 1 Voltage

Logic 0 Voltage

Logic 1 Current

Logic 0 Current

FREQSEL Pin

Logic 1 Voltage

Logic 0 Voltage

Logic 1 Current

Logic 0 Current

FORCE_LOW Pin

Logic 1 Voltage

Logic 0 Voltage

Logic 1 Current

Logic 0 Current

2.0

2/3(VS) + 0.2

2.0

V

0.8

V

1.0

μA

155

μA

V

1/3(VS) − 0.2 V

45

μA

30

μA

V

0.8

V

240

μA

2.0

μA

REFSEL has a 30 kΩ pull-up resistor.

FREQSEL has a 150 kΩ pull-up resistor and a

100 kΩ pull-down resistor.

FORCE_LOW has a 16 kΩ pull-down resistor.

POWER

Typical (typ) is given for VS = 3.3 V ± 10%, TA = 25°C, unless otherwise noted. Minimum (min) and maximum (max) values are given

over full VS and TA (−40°C to +85°C) variation.

Table 9.

Parameter

Min

Power Supply

3.0

LVDS Power Dissipation

LVPECL Power Dissipation

Typ

3.3

715

1075

Max

3.6

870

1305

Unit

Test Conditions/Comments

V

mW

mW

CRYSTAL OSCILLATOR

Typical (typ) is given for VS = 3.3 V ± 10%, TA = 25°C, unless otherwise noted. Minimum (min) and maximum (max) values are given

over full VS and TA (−40°C to +85°C) variation.

Table 10.

Parameter

CRYSTAL SPECIFICATION

Frequency

ESR

Load Capacitance

Phase Noise

Stability

Min

Typ

Max

Unit

Test Conditions/Comments

Fundamental mode

25

MHz

50

Ω

14

pF

−135

dBc/Hz @ 1 kHz offset

−30

+30

ppm

Rev. 0 | Page 7 of 20

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