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ADE3700SX View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
ADE3700SX Datasheet PDF : 89 Pages
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ADE3700
Analog-to-Digital Converter (ADC)
Register Name
FM_FS_CTRL
FM_FS_PR_0
FM_FS_PR_1
FM_FS_PR_2
FM_FS_PR_3
FM_FS_AMPLITUDE
FM_FS_PERIODX64
FM_FS_PULSE_EXT
Table 5: FM Frequency Synthesizer Registers
Addr
0x0830
0x0831
0x0832
0x0833
0x0834
0x0835
0x0836
0x0837
Mode Bits
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
[7:4]
[3]
[2]
[1]
[0]
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
[7]
[6:3]
[2:0]
Default
0x0
0x0
0x0
0x0
8000000
0x0
0x80
0x0
0x0
Description
Reserved
Clear the FM synthesizer
Clear the fs accumulator
Activate the frequency modulation
Divide the output by 2
Phase Rate
LSB = 72 ps
LSB = 1.185 us
Enable
Reserved
Value
2.3 Analog-to-Digital Converter (ADC)
The analog port consists of three 9-bit RGB ADCs with preamp, gain/offset adjustment and digital
filtering. The I2C interface for the ADC block is in the INCLK clock domain which must be active for
programming.
The relationship of input voltage, gain and offset register settings to output code is approximately as
follows:
output_code_8b = 457 x offset / 28 + 181 x gain x input_mV / 216 - 125 x gain x offset / 216 - 219
Register
ADC_DITHER
ADC_OFFSET_R
ADC_OFFSET_G
Table 6: ADC Registers (Sheet 1 of 2)
Addr.
0x0324
0x0326
0x0328
Mode Bits
[7]
R/W
[6]
R/W
[5]
R/W
[4]
R/W
[3]
R/W
[2]
[1:0]
R/W
[7:0]
R/W
[7:0]
Default
Description
Reserved
0x0
Dither horizontally
0x0
Dither vertically
0x0
Dither temporally
0x0
Force dither high
0x0
Enable dither
0x0
Reserved
0x0
Offset Control, Red Channel
0x0
Offset Control, Green Channel
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