ADE3000SX View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
ADE3000SX Datasheet PDF : 88 Pages
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ADE3XXX
Register Name
SMUX_CTRL2
SMUX_CLAMP_SET_L
SMUX_CLAMP_SET_H
SMUX_CLAMP_RST_L
SMUX_CLAMP_RST_H
SMUX_HENAB_SET_L
SMUX_HENAB_SET_H
SMUX_HENAB_RST_L
SMUX_HENAB_RST_H
SMUX_VENAB_SET_L
SMUX_VENAB_SET_H
SMUX_VENAB_RST_L
SMUX_VENAB_RST_H
SMUX_HSYNC_PHASE
SMUX_VSYNC_PHASE
Sync Mux Block
Table 14: Sync Mux Registers (Sheet 2 of 2)
Addr
0x0202
0x0203
0x0204
0x0205
0x0206
0x0207
0x0208
0x0209
0x020A
0x020B
0x020C
0x020D
0x020E
0x020F
0x0210
Mode Bits Default
Description
R
R/W
[7] 0x0
[6] 0x0
V_reference toggle output
Software odd set (for testing odd params on
the bench)
R/W
[5:4] 0x0
R/W
[3] 0x0
R/W
[2] 0x0
Odd_out select
0x0: YUV
0x1: v_reference toggle
0x2: SMUX_CTRL2[6]
0x3: Reserved
Valid_out select
0: YUV
1: valid_generated
Enab_out select
0: enab_internal
1: enab_generated
R/W
[1] 0x0
Vsync_out select
0: vsync_internal
1: hsync_generated
R/W
[0] 0x0
R/W
R/W
R/W
R/W
[7:0] 0x0
[3:0] 0x0
[7:0] 0x0
[3:0] 0x0
Hsync_out select
0: hsync_internal
1: hsync_generated
ADC clamp signal rising edge [11:0], relative
to selected horizontal reference signal, in
INCLKs (pixels)
ADC clamp falling edge [11:0]
R/W
R/W
[7:0] 0x0
[3:0] 0x0
Horizontal enable start [11:0] (left edge of
image) relative to the selected horizontal
reference edge in INCLKs (pixels))
R/W
R/W
R/W
R/W
R/W
R/W
[7:0] 0x0
[3:0] 0x0
[7:0] 0x0
[3:0] 0x0
[7:0] 0x0
[3:0] 0x0
Horizontal enable end [11:0]
Vertical enable start [11:0] (top edge of
image) relative to the selected vertical
reference edge (in lines)
Vertical enable end
R/W
[7:0] 0x0
R/W
[7:0] 0x0
Number of horizontal pixels/INCLKs that the
generated hsync edge is from the horizontal
reference edge. 2’s complement
[-128,127]
Number of vertical lines that the generated
vsync edge is from the vertical reference
edge. 2’s complement
[-128,127]
41/88
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