ADE3800SXT View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ADE3800SXT

Analog LCD Display Engine for XGA and SXGA Resolutions with Embedded LVDS and RSDS Transmitters

STMicroelectronics 

ADE3800

Register Description by Block

Register Name

SRT_VS_SEL

SRT_COAST_RISE_HW_L

SRT_COAST_RISE_HW_M

SRT_COAST_RISE_HW_U

SRT_COAST_FALL_HW_L

SRT_COAST_FALL_HW_M

SRT_COAST_FALL_HW_U

Table 16: Sync Retiming Registers (Sheet 2 of 2)

Addr Mode Bits Rst

Description

01EF

R

R/W

01F0 R

01F1 R

01F2 R

01F3 R

01F4 R

01F5 R

[5:4] 00 sclk div prescaler for SMEAS:

0*: 128

1: 256

2: 512

3: 1024

[3]

Bad csync threshold. Change SRT_CSYNC_THR until

this is stable low.

[2:0]

vert sync source select for re-sampling into inclk domain

for SMUX:

0*: VSYNC pin

1: vsync from composite HSYNC pin

2: vsync from composite SOG[0] comparator

3: vsync from composite SOG[1] comparator

4: vsync from composite SOG[2] comparator

5: filtered and delayed vsync (normal)

6: vsync from alt SOG source pin

7: reserved

[7:0]

Shadow read back

[7:0]

[7:0]

[7:0]

[7:0]

[7:0]

Note: All thresholds are in XCLK units.

35/138

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