Data Sheet
ADE7816
TIMING CHARACTERISTICS
VDD = 3.3 V ± 10%, AGND = DGND = 0 V, on-chip reference, CLKIN = 16.384 MHz, TMIN to TMAX = −40°C to +85°C. Note that, within
the timing tables and diagrams, the dual function pin names are referenced by the relevant function only; see the Pin Configuration and
Function Descriptions section for full pin mnemonics and function descriptions.
I2C-Compatible Interface Timing
Table 2. I2C-Compatible Interface Timing Parameters
Parameter
SCL Clock Frequency
Hold Time (Repeated) Start Condition
Low Period of SCL Clock
High Period of SCL Clock
Setup Time for Repeated Start Condition
Data Hold Time
Data Setup Time
Rise Time of Both SDA and SCL Signals
Fall Time of Both SDA and SCL Signals
Setup Time for Stop Condition
Bus Free Time Between a Stop and Start Condition
Pulse Width of Suppressed Spikes
Symbol
fSCL
tHD;STA
tLOW
tHIGH
tSU;STA
tHD;DAT
tSU;DAT
tR
tF
tSU;STO
tBUF
tSP
Standard Mode
Fast Mode
Min
Max
Min Max Unit
0
100
0
400 kHz
4.0
0.6
μs
4.7
1.3
μs
4.0
0.6
μs
4.7
0.6
μs
0
3.45
0
0.9
μs
250
100
ns
1000
20
300 ns
300
20
300 ns
4.0
0.6
μs
4.7
1.3
μs
N/A1
50
ns
1 N/A means not applicable.
SDA
tF
tR
tLOW
SCL
tHD;STA tHD;DAT
START
CONDITION
tSU;DAT
tR
tHD;STA
tSP
tR
tBUF
tHIGH
tSU;STA
REPEATED START
CONDITION
Figure 2. I2C-Compatible Interface Timing
tSU;STO
STOP
START
CONDITION CONDITION
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