ADP-I2C-USB-Z View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
ADP-I2C-USB-Z Datasheet PDF : 108 Pages
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ADP1051
The initial modulation value is calculated as
t MODU _ INI
= t MODU _ NOM
× VOUT
VOUT _ NOM
where:
tMODU_INI is the initial modulation value when the controller begins
to generate PWM pulses during startup.
tMODU_NOM is the modulation value set by Register 0xFE39. It
emulates the modulation value when the input voltage and the
output voltage are in the nominal condition.
VOUT is the sensed output voltage.
VOUT_NOM is the nominal output voltage set by VOUT_COMMAND
(Register 0x21).
If the closed-loop line voltage feedforward function is selected,
the input voltage is introduced from the feedforward loop, and
the VIN value is always included for calculation of the initial
modulation value.
SR reverse current protection can be used in pre-bias start-up
mode. See the SR Reverse Current Protection section for details.
SR soft start can also be enabled in this mode to achieve a smooth
transition. See the Synchronous Rectification section for details.
OUTPUT VOLTAGE DROOPING CONTROL
Output voltage drooping control can be used in the ADP1051.
This feature is used for current sharing applications. Output voltage
drooping is introduced digitally by modifying the value of the
digital output voltage reference, based on the output current value.
Two parameters can be configured independently: the drooping
resistor and the output current averaging speed.
The drooping resistor follows the PMBus specifications. The
VOUT_DROOP command (Register 0x28) specifies the drooping
resistor in the range of 0 mΩ to 255 mΩ.
The CS2 (output current) averaging speed dictates how quickly
the output current is sensed for generating the digital voltage
reference. Register 0xFE1E[7:6] can be set to change the output
current update speed from 82 μs to 656 μs. An output current
update of 82 µs is recommended.
VDD AND VCORE
When the voltage of the VDD pin is applied (VDD), there is a
delay before the part can regulate the power supply. When VDD
rises above the power-on reset and UVLO levels, it takes ~20 μs for
the VCORE pin (Pin 18) to reach its operational point of 2.6 V.
The EEPROM contents are then downloaded to the registers. The
download takes approximately an additional 120 μs. After the
EEPROM contents are downloaded, the ADP1051 is ready for
operation; however, it takes a maximum of 52 ms for the ADP1051
to complete initialization of the address after a power-on reset.
Therefore, it is recommended that the master device access the
ADP1051 at least 52 ms after power-on reset.
Data Sheet
If the ADP1051 is programmed to power up at this time, the soft
start ramp begins. Otherwise, the part waits for a PSON signal,
as programmed in Register 0x01 and Register 0x02.
To minimize trace length, the proper amount of decoupling
capacitance must be placed between the VDD pin (Pin 19) and the
AGND pin (Pin 20), as close as possible to the device. The same
requirement applies to the VCORE pin (Pin 18). It is recom-
mended that the VCORE pin not be used as a reference or to
generate other logic levels using resistive dividers.
CHIP PASSWORD
On power-up, some registers in the ADP1051 are locked and
protected from being written to or read from. When the chip is
locked, the following commands and all read only registers are
accessible:
OPERATION
ON_OFF_CONFIG
CLEAR_FAULTS
WRITE_PROTECT
RESTORE_DEFAULT_ALL
VOUT_COMMAND
VOUT_TRIM
VOUT_CAL_OFFSET
Unlock the Chip Password
To unlock the chip password, perform two consecutive writes
with the correct password (default value = 0xFFFF) and using
the CHIP_PASSWORD command (Register 0xD7). Between the
two write actions, any read or write action to another register in
this device interrupts the unlocking of the chip password. The
CHIP_PASSWORD_UNLOCKED flag (Register 0xFEA0[7])
is set to indicate that the chip password is unlocked for access.
Lock the Chip Password
To lock the chip password, use the CHIP_PASSWORD command
(Register 0xD7) to write any value other than the correct password.
The CHIP_PASSWORD_UNLOCKED flag (Register 0xFEA0[7])
is then cleared to indicate that the chip password is locked from
access.
Change the Chip Password
To change the chip password, first write the old password, using the
CHIP_PASSWORD command (Register 0xD7). Next, write the
new password, using the same command. The chip password is
changed to the new password. If the chip password is to be changed
permanently, the register contents must be saved in the EEPROM
after the chip password is changed. If the correct chip password is
lost, the RESTORE_DEFAULT_ALL command (Register 0x12)
restores the factory default settings. In this case, all the user settings
are reset.
Rev. B | Page 28 of 108
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