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ADS6445, ADS6444
ADS6443, ADS6442
SLAS531 – MAY 2007
SERIAL INTERFACE TIMING CHARACTERISTICS
Typical values at 25°C, min and max values across the full temperature range TMIN = –40°C to TMAX = 85°C, AVDD = LVDD
= 3.3V, unless otherwise noted.
fSCLK
tSLOADS
tSLOADH
tDSU
tDH
PARAMETER
SCLK Frequency, fSCLK = 1/tSCLK
SEN to SCLK Setup time
SCLK to SEN Hold time
SDATA Setup time
SDATA Hold time
Time taken for register write to take effect after 16th SCLK falling edge
MIN
> DC
TYP MAX
20
25
25
25
25
100
UNIT
MHz
ns
ns
ns
ns
ns
RESET TIMING
Typical values at 25°C, min and max values across the full temperature range TMIN = –40°C to TMAX = 85°C, AVDD = LVDD
= 3.3V, unless otherwise noted.
PARMATER
CONDITIONS
t1
Power-on delay time
Delay from power-up of AVDD and LVDD to RESET pulse
active
t2
Reset pulse width
Pulse width of active RESET signal
t3
Register write delay time Delay from RESET disable to SEN active
tPO
Power-up delay time
Delay from power-up of AVDD and LVDD to output stable
MIN TYP MAX
5
10
25
6.5
UNIT
ms
ns
ns
ms
Power Supply
AVDD, LVDD
t1
RESET
t2
SEN
Figure 5. Reset Timing
t3
T0108-03
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