AT83C51RB2-3CSCM View Datasheet(PDF) - Atmel Corporation
Part Name
Description
Manufacturer
AT83C51RB2-3CSCM Datasheet PDF : 83 Pages
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Power-off Flag
The Power-off flag allows the user to distinguish between a “cold start” reset and a
“warm start” reset.
A cold start reset is the one induced by VCC switch-on. A warm start reset occurs while
VCC is still applied to the device and could be generated for example by an exit from
power-down.
The Power-off flag (POF) is located in PCON register (Table 47). POF is set by hard-
ware when VCC rises from 0 to its nominal voltage. The POF can be set or cleared by
software allowing the user to determine the type of reset.
Table 47. PCON Register
PCON - Power Control Register (87h)
7
6
5
SMOD1 SMOD0
-
4
3
2
1
0
POF
GF1
GF0
PD
IDL
Bit
Bit
Number Mnemonic Description
7
SMOD1
Serial port Mode bit 1
Set to select double baud rate in mode 1, 2 or 3.
Serial port Mode bit 0
6
SMOD0 Cleared to select SM0 bit in SCON register.
Set to select FE bit in SCON register.
5
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Power-off Flag
4
POF
Cleared to recognize next reset type.
Set by hardware when VCC rises from 0 to its nominal voltage. Can also be set by
software.
General purpose Flag
3
GF1 Cleared by user for general purpose usage.
Set by user for general purpose usage.
General purpose Flag
2
GF0 Cleared by user for general purpose usage.
Set by user for general purpose usage.
Power-down mode bit
1
PD Cleared by hardware when reset occurs.
Set to enter power-down mode.
Idle mode bit
0
IDL Cleared by hardware when interrupt or reset occurs.
Set to enter idle mode.
Reset Value = 00X1 0000b
Not bit addressable
64 AT80C51RD2/AT83C51Rx2
4113B–8051–03/05
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