AT87F51RC-12PC View Datasheet(PDF) - Atmel Corporation
Part Name
Description
Manufacturer
AT87F51RC-12PC Datasheet PDF : 25 Pages
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Programming Interface
Every code byte in the QuickFlash array can be pro-
grammed by using the appropriate combination of control
signals. The write operation cycle is self-timed and once
initiated, will automatically time itself to completion.
Table 9. QuickFlash Programming Modes
All major programming vendors offer worldwide support for
the Atmel microcontroller series. Please contact your local
programming vendor for the appropriate software revision.
Mode
Write Code Data
Read Code Data
Write Lock Bit 1
VCC
5V
5V
6.5 V
RST
H
H
H
PSEN
L
L
L
ALE/
PROG
H
EA/
VPP
12 V
H
12 V
P2.6
L
L
H
P2.7
H
L
H
P3.3
H
L
H
P3.6
H
H
H
P3.7
H
H
H
P0.7-0
Data
DIN
DOUT
X
P3.4
A14
A14
X
P2.5-0 P1.7-0
Address
A13-8 A7-0
A13-8 A7-0
X
X
Write Lock Bit 2
6.5 V H
L
12 V H
H
H
L
L
X
X
X
X
Write Lock Bit 3
6.5 V H
L
12 V H
L
H
H
L
X
X
X
X
Read Lock Bits
1, 2, 3
5V
H
L
H
H
H
H
L
H
L
D2, 3, 4
X
X
X
Read Atmel ID
5V
H
L
H
H
L
L
L
L
L
1EH
X
X
000H
Read Device ID
5V
H
L
H
H
L
L
L
L
L
87H
X
X
100H
Read Device ID
5V
H
L
H
H
L
L
L
L
L
07H
X
X
200H
Notes: 1. Each Prog/pulse is 200 ns for Write Code Data and 100 ms for Write Lock Bits.
2. RDY/BSY signal is output on P3.0 during programming.
Figure 10. Programming the QuickFlash Memory
Figure 11. Verifying the QuickFlash Memory
AT87F51RC
ADDR. A0 - A7 P1.0-P1.7
VCC
0000H/7FFFH A8 - A13
P2.0 - P2.5 P0
A14*
P3.4
P2.6
SEE FLASH
PROGRAMMING
P2.7
ALE
P3.3
MODES TABLE
P3.6
P3.7
XTAL 2
EA
+5V
PGM
DATA
PROG
VIH/VPP
AT87F51RC
A0 - A7
ADDR.
P1.0-P1.7
VCC
0000H/7FFFH A8 - A13
P2.0 - P2.5 P0
A14*
P3.4
P2.6
SEE FLASH
PROGRAMMING
P2.7
ALE
P3.3
MODES TABLE
P3.6
P3.7
XTAL 2
EA
+5V
PGM DATA
(USE 10K
PULLUPS)
VIH
3-24 MHz
P3.0
RDY/
BSY
3-24 MHz
XTAL1
RST
VIH
GND
PSEN
XTAL1
RST
VIH
GND
PSEN
*Programming address line A14 (P3.4) is not the same as the external memory address line A14 (P2.6).
16
AT87F51RC
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