ATMEGA323L-4AI View Datasheet(PDF) - Atmel Corporation

Part Name

Description

Manufacturer

ATMEGA323L-4AI

8-bit Microcontroller with 32K Bytes of In-System Programmable Flash

Atmel Corporation 

ATmega323(L)

Figure 34. Effects of Unsynchronized OCR Latching in Up/Down Mode

Compare Value changes

Counter Value

Compare Value

Synchronized OCn Latch

Compare Value changes

PWM Output OCn

Counter Value

Compare Value

Unsynchronized OCn Latch

Glitch

PWM Output OCn

Figure 35. Effects of Unsynchronized OCR Latching in Overflow Mode

Compare Value changes

Counter Value

Compare Value

Synchronized OCn Latch

PWM Output OCn

Compare Value changes

Counter Value

Compare Value

Glitch

Unsynchronized OCn Latch

PWM Output OCn

Note: n = 0 or 2 (Figure 34 and Figure 35).

During the time between the write and the latch operation, a read from the Output Com-

pare Registers will read the contents of the temporary location. This means that the

most recently written value always will read out of OCR0 and OCR2.

When the Output Compare Register contains $00 or $FF, and the up/down PWM mode

is selected, the output PB3(OC0/PWM0)/PD7(OC2/PWM2) is updated to low or high on

the next compare match according to the settings of COMn1/COMn0. This is shown in

Table 16. In overflow PWM mode, the output PB3(OC0/PWM0)/PD7(OC2/PWM2) is

held low or high only when the Output Compare Register contains $FF.

51

1457G–AVR–09/03

Share Link: