ATMEGA323L-4AI View Datasheet(PDF) - Atmel Corporation
Part Name
Description
Manufacturer
ATMEGA323L-4AI Datasheet PDF : 247 Pages
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1457G–AVR–09/03
ATmega323(L)
Table 20. Timer TOP Values and PWM Frequency
CTC1 PWM11 PWM10 PWM Resolution Timer TOP Value Frequency
0
0
1
0
1
0
0
1
1
1
0
1
1
1
0
1
1
1
8-bit
9-bit
10-bit
8-bit
9-bit
10-bit
$00FF (255)
$01FF (511)
$03FF(1023)
$00FF (255)
$01FF (511)
$03FF(1023)
fTCK1/510
fTCK1/1022
fTCK1/2046
fTCK1/256
fTCK1/512
fTCK1/1024
As shown in Table 20, the PWM operates at either 8, 9, or 10 bits resolution. Note the
unused bits in OCR1A, OCR1B, and TCNT1 will automatically be written to zero by
hardware. I.e., bit 9 to 15 will be set to zero in OCR1A, OCR1B, and TCNT1 if the 9-bit
PWM resolution is selected. This makes it possible for the user to perform Read-Modify-
Write operations in any of the three resolution modes and the unused bits will be treated
as don’t care.
Table 21. Timer TOP Values and PWM Frequency
PWM Resolution
Timer TOP Value
8-bit
$00FF (255)
9-bit
$01FF (511)
10-bit
$03FF(1023)
Frequency
fTC1/510
fTC1/1022
fTC1/2046
Table 22. Compare1 Mode Select in PWM Mode(1)
CTC1 COM1X1 COM1X0 Effect on OCX1
0
0
0
Not connected
0
0
1
Reserved
0
1
0
Cleared on Compare Match, up-counting. Set on
Compare Match, down-counting (non-inverted PWM).
0
1
1
Cleared on Compare Match, down-counting. Set on
Compare Match, up-counting (inverted PWM).
1
0
0
Not connected
1
0
1
Reserved
1
1
0
Cleared on Compare Match, set on overflow.
1
1
1
Set on Compare Match, cleared on overflow.
Note: 1. X = A or B
Note that in the PWM mode, the 8, 9, or 10 least significant OCR1A/OCR1B bits
(depending on resolution), when written, are transferred to a temporary location. They
are latched when Timer/Counter1 reaches the value TOP. This prevents the occurrence
of odd-length PWM pulses (glitches) in the event of an unsynchronized OCR1A/OCR1B
write. See Figure 38 and Figure 39 for an example in each mode.
61
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