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ATMEGA64L-8MI View Datasheet(PDF) - Atmel Corporation

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ATMEGA64L-8MI Datasheet PDF : 363 Pages
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Figure 50. Compare Match Output Unit, Schematic
ATmega64(L)
COMnx1
COMnx0
FOCnx
Waveform
Generator
DQ
1
OCnx
0
DQ
OCnx
Pin
PORT
DQ
Compare Output Mode and
Waveform Generation
clkI/O
DDR
The general I/O port function is overridden by the Output Compare (OCnx) from the
Waveform Generator if either of the COMnx1:0 bits are set. However, the OCnx pin
direction (input or output) is still controlled by the Data Direction Register (DDR) for the
port pin. The Data Direction Register bit for the OCnx pin (DDR_OCnx) must be set as
output before the OCnx value is visible on the pin. The port override function is generally
independent of the Waveform Generation mode, but there are some exceptions. Refer
to Table 58, Table 59 and Table 60 for details.
The design of the Output Compare pin logic allows initialization of the OCnx state before
the output is enabled. Note that some COMnx1:0 bit settings are reserved for certain
modes of operation. See “16-bit Timer/Counter Register Description” on page 131.
The COMnx1:0 bits have no effect on the Input Capture unit.
The Waveform Generator uses the COMnx1:0 bits differently in Normal, CTC, and PWM
modes. For all modes, setting the COMnx1:0 = 0 tells the Waveform Generator that no
action on the OCnx Register is to be performed on the next Compare Match. For com-
pare output actions in the non-PWM modes refer to Table 58 on page 132. For fast
PWM mode refer to Table 59 on page 132, and for phase correct and phase and fre-
quency correct PWM refer to Table 60 on page 133.
A change of the COMnx1:0 bits state will have effect at the first Compare Match after
the bits are written. For non-PWM modes, the action can be forced to have immediate
effect by using the FOCnx strobe bits.
2490G–AVR–03/04
121

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