ATMEGA64L-8MI View Datasheet(PDF) - Atmel Corporation

Part Name

Description

Manufacturer

ATMEGA64L-8MI

8-bit AVR® Microcontroller with 64K Bytes In-System Programmable Flash

Atmel Corporation 

ATmega64(L)

Timer/Counter Timing

Diagrams

non-inverted PWM and an inverted PWM output can be generated by setting the

COMnx1:0 to three (See Table 60 on page 133). The actual OCnx value will only be vis-

ible on the port pin if the data direction for the port pin is set as output (DDR_OCnx). The

PWM waveform is generated by setting (or clearing) the OCnx Register at the Compare

Match between OCRnx and TCNTn when the counter increments, and clearing (or set-

ting) the OCnx Register at Compare Match between OCRnx and TCNTn when the

counter decrements. The PWM frequency for the output when using phase and fre-

quency correct PWM can be calculated by the following equation:

fOCnxPFCPWM = 2-----⋅-f--cN---l-k--⋅_---IT-/-O--O----P--

The N variable represents the prescaler divider (1, 8, 64, 256, or 1024).

The extreme values for the OCRnx Register represent special cases when generating a

PWM waveform output in the phase correct PWM mode. If the OCRnx is set equal to

BOTTOM the output will be continuously low and if set equal to TOP the output will be

set to high for non-inverted PWM mode. For inverted PWM the output will have the

opposite logic values. If OCnA is used to define the TOP value (WGMn3:0 = 9) and

COMnA1:0 = 1, the OCnA output will toggle with a 50% duty cycle.

The Timer/Counter is a synchronous design and the timer clock (clkTn) is therefore

shown as a clock enable signal in the following figures. The figures include information

on when interrupt flags are set, and when the OCRnx Register is updated with the

OCRnx buffer value (only for modes utilizing double buffering). Figure 55 shows a timing

diagram for the setting of OCFnx.

Figure 55. Timer/Counter Timing Diagram, Setting of OCFnx, no Prescaling

clkI/O

clkTn

(clkI/O/1)

TCNTn

OCRnx - 1

OCRnx

OCRnx + 1

OCRnx + 2

OCRnx

OCRnx Value

OCFnx

Figure 56 shows the same timing data, but with the prescaler enabled.

2490G–AVR–03/04

129

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