Table 119. Fuse High Byte
Fuse High Byte Bit no Description
OCDEN
7 Enable OCD
JTAGEN(4)
6 Enable JTAG
SPIEN(1)
CKOPT(2)
EESAVE
BOOTSZ1
BOOTSZ0
BOOTRST
5 Enable SPI Serial Program and
Data Downloading
4 Oscillator options
3 EEPROM memory is preserved
through the Chip Erase
2 Select Boot Size (see Table 113
for details)
1 Select Boot Size (see Table 113
for details)
0 Select Reset Vector
Default Value
1 (unprogrammed, OCD
disabled)
0 (programmed, JTAG
enabled)
0 (programmed, SPI prog.
enabled)
1 (unprogrammed)
1 (unprogrammed,
EEPROM not preserved)
0 (programmed)(3)
0 (programmed)(3)
1 (unprogrammed)
Notes:
1. The SPIEN Fuse is not accessible in SPI Serial Programming mode.
2. The CKOPT Fuse functionality depends on the setting of the CKSEL bits. See “Clock
Sources” on page 36 for details.
3. The default value of BOOTSZ1..0 results in maximum Boot Size. See Table 113 on
page 289
4. If the JTAG interface is left unconnected, the JTAGEN fuse should if possible be dis-
abled. This to avoid static current at the TDO pin in the JTAG interface
Table 120. Fuse Low Byte
Fuse Low Byte
BODLEVEL
BODEN
Bit no
7
6
Description
Brown out detector trigger
level
Brown out detector enable
SUT1
SUT0
CKSEL3
CKSEL2
CKSEL1
CKSEL0
5 Select start-up time
4 Select start-up time
3 Select Clock source
2 Select Clock source
1 Select Clock source
0 Select Clock source
Default Value
1 (unprogrammed)
1 (unprogrammed, BOD
disabled)
1 (unprogrammed)(1)
0 (programmed)(1)
0 (programmed)(2)
0 (programmed)(2)
0 (programmed)(2)
1 (unprogrammed)(2)
Notes:
1. The default value of SUT1..0 results in maximum start-up time. See Table 14 on page
40 for details.
2. The default setting of CKSEL3..0 results in internal RC Oscillator @ 1 MHz. See
Table 6 on page 36 for details.
The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are
locked if Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the
Lock bits.
292 ATmega64(L)
2490G–AVR–03/04