ATmega64(L)
Table 44. Overriding Signals for Alternate Functions in PF3..PF0
Signal
Name PF3/ADC3
PF2/ADC2
PF1/ADC1
PUOE 0
0
0
PUOV 0
0
0
DDOE 0
0
0
DDOV 0
0
0
PVOE 0
0
0
PVOV 0
0
0
DIEOE 0
0
0
DIEOV 0
0
0
DI
–
–
–
AIO
ADC3 INPUT
ADC2 INPUT
ADC1 INPUT
PF0/ADC0
0
0
0
0
0
0
0
0
–
ADC0 INPUT
Alternate Functions of Port G
In ATmega103 compatibility mode, only the alternate functions are the defaults for Port
G, and Port G cannot be used as General Digital Port Pins. The alternate pin configura-
tion is as follows:
Table 45. Port G Pins Alternate Functions
Port Pin
Alternate Function
PG4
TOSC1 (RTC Oscillator Timer/Counter0)
PG3
TOSC2 (RTC Oscillator Timer/Counter0)
PG2
ALE (Address Latch Enable to external memory)
PG1
RD (Read strobe to external memory)
PG0
WR (Write strobe to external memory)
• TOSC1 – Port G, Bit 4
TOSC2, Timer Oscillator pin 1: When the AS0 bit in ASSR is set (one) to enable asyn-
chronous clocking of Timer/Counter0, pin PG4 is disconnected from the port, and
becomes the inverting output of the Oscillator amplifier. In this mode, a crystal Oscillator
is connected to this pin, and the pin can not be used as an I/O pin.
• TOSC2 – Port G, Bit 3
TOSC2, Timer Oscillator pin 2: When the AS0 bit in ASSR is set (one) to enable asyn-
chronous clocking of Timer/Counter0, pin PG3 is disconnected from the port, and
becomes the input of the inverting Oscillator amplifier. In this mode, a crystal Oscillator
is connected to this pin, and the pin cannot be used as an I/O pin.
• ALE – Port G, Bit 2
ALE is the external data memory Address Latch Enable signal.
• RD – Port G, Bit 1
RD is the external data memory read control strobe.
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2490G–AVR–03/04