ATMEGA64L-8MI View Datasheet(PDF) - Atmel Corporation

Part Name

Description

Manufacturer

ATMEGA64L-8MI

8-bit AVR® Microcontroller with 64K Bytes In-System Programmable Flash

Atmel Corporation 

ATmega64(L)

Compare Match Output

Unit

The Compare Output mode (COM01:0) bits have two functions. The Waveform Genera-

tor uses the COM01:0 bits for defining the Output Compare (OC0) state at the next

Compare Match. Also, the COM01:0 bits control the OC0 pin output source. Figure 37

shows a simplified schematic of the logic affected by the COM01:0 bit setting. The I/O

Registers, I/O bits, and I/O pins in the figure are shown in bold. Only the parts of the

general I/O port control registers (DDR and PORT) that are affected by the COM01:0

bits are shown. When referring to the OC0 state, the reference is for the internal OC0

Register, not the OC0 pin.

Figure 37. Compare Match Output Unit, Schematic

COMn1

COMn0

FOCn

Waveform

Generator

DQ

1

OCn

0

OCn

Pin

DQ

PORT

DQ

Compare Output Mode and

Waveform Generation

clkI/O

DDR

The general I/O port function is overridden by the Output Compare (OC0) from the

Waveform Generator if either of the COM01:0 bits are set. However, the OC0 pin direc-

tion (input or output) is still controlled by the Data Direction Register (DDR) for the port

pin. The Data Direction Register bit for the OC0 pin (DDR_OC0) must be set as output

before the OC0 value is visible on the pin. The port override function is independent of

the Waveform Generation mode.

The design of the Output Compare pin logic allows initialization of the OC0 state before

the output is enabled. Note that some COM01:0 bit settings are reserved for certain

modes of operation. See “8-bit Timer/Counter Register Description” on page 102.

The Waveform Generator uses the COM01:0 bits differently in Normal, CTC, and PWM

modes. For all modes, setting the COM01:0 = 0 tells the Waveform Generator that no

action on the OC0 Register is to be performed on the next Compare Match. For com-

pare output actions in the non-PWM modes refer to Table 53 on page 103. For fast

PWM mode, refer to Table 54 on page 103, and for phase correct PWM refer to Table

55 on page 103.

95

2490G–AVR–03/04

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